drm/bridge: Prepare Analogix anx6345 support (dea73d61) · Commits · 戴 / test

drivers/gpu/drm/bridge/analogix/analogix-i2c-dptx.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -116,7 +116,7 @@ ssize_t anx_dp_aux_transfer(struct regmap *map_dptx,
		else /* For non-zero-sized set the length field. */
		ctrl1 \|= (msg->size - 1) << SP_AUX_LENGTH_SHIFT;

		if ((msg->request & DP_AUX_I2C_READ) == 0) {
		if ((msg->size > 0) && ((msg->request & DP_AUX_I2C_READ) == 0)) {
		/* When WRITE \| MOT write values to data buffer */
		err = regmap_bulk_write(map_dptx,
		SP_DP_BUF_DATA0_REG, buffer,

+8 −0

Original line number	Diff line number	Diff line
		@@ -72,7 +72,11 @@
		#define SP_CHA_STA BIT(2)
		/* Bits for DP System Control Register 3 */
		#define SP_HPD_STATUS BIT(6)
		#define SP_HPD_FORCE BIT(5)
		#define SP_HPD_CTRL BIT(4)
		#define SP_STRM_VALID BIT(2)
		#define SP_STRM_FORCE BIT(1)
		#define SP_STRM_CTRL BIT(0)
		/* Bits for DP System Control Register 4 */
		#define SP_ENHANCED_MODE BIT(3)

		@@ -117,6 +121,9 @@
		#define SP_LINK_BW_SET_MASK 0x1f
		#define SP_INITIAL_SLIM_M_AUD_SEL BIT(5)

		/* DP Lane Count Setting Register */
		#define SP_DP_LANE_COUNT_SET_REG 0xa1

		/* DP Training Pattern Set Register */
		#define SP_DP_TRAINING_PATTERN_SET_REG 0xa2

		@@ -130,6 +137,7 @@

		/* DP Link Training Control Register */
		#define SP_DP_LT_CTRL_REG 0xa8
		#define SP_DP_LT_INPROGRESS 0x80
		#define SP_LT_ERROR_TYPE_MASK 0x70
		# define SP_LT_NO_ERROR 0x00
		# define SP_LT_AUX_WRITE_ERROR 0x01

+3 −0

Original line number	Diff line number	Diff line
		@@ -177,6 +177,9 @@
		#define SP_VBIT BIT(1)
		#define SP_AUDIO_LAYOUT BIT(0)

		/* Analog Debug Register 1 */
		#define SP_ANALOG_DEBUG1_REG 0xdc

		/* Analog Debug Register 2 */
		#define SP_ANALOG_DEBUG2_REG 0xdd
		#define SP_FORCE_SW_OFF_BYPASS 0x20