Commit de76cda2 authored by Gustavo Pimentel's avatar Gustavo Pimentel Committed by Bjorn Helgaas
Browse files

PCI: Decode PCIe 32 GT/s link speed 

PCIe r5.0, sec 7.5.3.18, defines a new 32.0 GT/s bit in the Supported Link
Speeds Vector of Link Capabilities 2.  Decode this new speed.  This does
not affect the speed of the link, which should be negotiated automatically
by the hardware; it only adds decoding when showing the speed to the user.

Previously, reading the speed of a link operating at this speed showed
"Unknown speed" instead of "32.0 GT/s".

Link: https://lore.kernel.org/lkml/92365e3caf0fc559f9ab14bcd053bfc92d4f661c.1559664969.git.gustavo.pimentel@synopsys.com


Signed-off-by: default avatarGustavo Pimentel <gustavo.pimentel@synopsys.com>
[bhelgaas: changelog]
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 2d2f4273

drivers/pci/pci-sysfs.c

+3 −0
Original line number Diff line number Diff line
@@ -182,6 +182,9 @@ static ssize_t current_link_speed_show(struct device *dev, 
		return -EINVAL;



	switch (linkstat & PCI_EXP_LNKSTA_CLS) {

	case PCI_EXP_LNKSTA_CLS_32_0GB:

		speed = "32 GT/s";

		break;

	case PCI_EXP_LNKSTA_CLS_16_0GB:

		speed = "16 GT/s";

		break;

drivers/pci/pci.c

+3 −1
Original line number Diff line number Diff line
@@ -5621,7 +5621,9 @@ enum pci_bus_speed pcie_get_speed_cap(struct pci_dev *dev) 
	 */

	pcie_capability_read_dword(dev, PCI_EXP_LNKCAP2, &lnkcap2);

	if (lnkcap2) { /* PCIe r3.0-compliant */

		if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_16_0GB)

		if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_32_0GB)

			return PCIE_SPEED_32_0GT;

		else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_16_0GB)

			return PCIE_SPEED_16_0GT;

		else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB)

			return PCIE_SPEED_8_0GT;

drivers/pci/probe.c

+1 −1
Original line number Diff line number Diff line
@@ -668,7 +668,7 @@ const unsigned char pcie_link_speed[] = { 
	PCIE_SPEED_5_0GT,		/* 2 */

	PCIE_SPEED_8_0GT,		/* 3 */

	PCIE_SPEED_16_0GT,		/* 4 */

	PCI_SPEED_UNKNOWN,		/* 5 */

	PCIE_SPEED_32_0GT,		/* 5 */

	PCI_SPEED_UNKNOWN,		/* 6 */

	PCI_SPEED_UNKNOWN,		/* 7 */

	PCI_SPEED_UNKNOWN,		/* 8 */

drivers/pci/slot.c

+1 −0
Original line number Diff line number Diff line
@@ -75,6 +75,7 @@ static const char *pci_bus_speed_strings[] = { 
	"5.0 GT/s PCIe",	/* 0x15 */

	"8.0 GT/s PCIe",	/* 0x16 */

	"16.0 GT/s PCIe",	/* 0x17 */

	"32.0 GT/s PCIe",	/* 0x18 */

};



static ssize_t bus_speed_read(enum pci_bus_speed speed, char *buf)

include/linux/pci.h

+1 −0
Original line number Diff line number Diff line
@@ -258,6 +258,7 @@ enum pci_bus_speed { 
	PCIE_SPEED_5_0GT		= 0x15,

	PCIE_SPEED_8_0GT		= 0x16,

	PCIE_SPEED_16_0GT		= 0x17,

	PCIE_SPEED_32_0GT		= 0x18,

	PCI_SPEED_UNKNOWN		= 0xff,

};

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