Commit de4ad1b1 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Revert "usb:cdns3 Add Cadence USB3 DRD Driver" 



This reverts commit 8bc1901c.

It's broken.

Reported-by: default avatarStephen Rothwell <sfr@canb.auug.org.au>
Cc: Felipe Balbi <balbi@kernel.org>
Cc: Pawel Laszczak <pawell@cadence.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent bff2a75b

drivers/usb/Kconfig

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@@ -113,8 +113,6 @@ source "drivers/usb/usbip/Kconfig" 


endif



source "drivers/usb/cdns3/Kconfig"



source "drivers/usb/mtu3/Kconfig"



source "drivers/usb/musb/Kconfig"

drivers/usb/Makefile

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@@ -13,8 +13,6 @@ obj-$(CONFIG_USB_DWC3) += dwc3/ 
obj-$(CONFIG_USB_DWC2)		+= dwc2/

obj-$(CONFIG_USB_ISP1760)	+= isp1760/



obj-$(CONFIG_USB_CDNS3)		+= cdns3/



obj-$(CONFIG_USB_MON)		+= mon/

obj-$(CONFIG_USB_MTU3)		+= mtu3/

drivers/usb/cdns3/Kconfig

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config USB_CDNS3

	tristate "Cadence USB3 Dual-Role Controller"

	depends on USB_SUPPORT && (USB || USB_GADGET) && HAS_DMA

	help

	  Say Y here if your system has a Cadence USB3 dual-role controller.

	  It supports: dual-role switch, Host-only, and Peripheral-only.



	  If you choose to build this driver is a dynamically linked

	  as module, the module will be called cdns3.ko.



if USB_CDNS3



config USB_CDNS3_GADGET

	bool "Cadence USB3 device controller"

	depends on USB_GADGET

	help

	  Say Y here to enable device controller functionality of the

	  Cadence USBSS-DEV driver.



	  This controller supports FF, HS and SS mode. It doesn't support

	  LS and SSP mode.



config USB_CDNS3_HOST

	bool "Cadence USB3 host controller"

	depends on USB_XHCI_HCD

	help

	  Say Y here to enable host controller functionality of the

	  Cadence driver.



	  Host controller is compliant with XHCI so it will use

	  standard XHCI driver.



config USB_CDNS3_PCI_WRAP

	tristate "Cadence USB3 support on PCIe-based platforms"

	depends on USB_PCI && ACPI

	default USB_CDNS3

	help

	  If you're using the USBSS Core IP with a PCIe, please say

	  'Y' or 'M' here.



	  If you choose to build this driver as module it will

	  be dynamically linked and module will be called cdns3-pci.ko



endif

drivers/usb/cdns3/Makefile

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# SPDX-License-Identifier: GPL-2.0

# define_trace.h needs to know how to find our header

CFLAGS_trace.o				:= -I$(src)



cdns3-y					:= core.o drd.o



obj-$(CONFIG_USB_CDNS3)			+= cdns3.o

ifneq ($(CONFIG_DEBUG_FS),)

	cdns3-y				+= debugfs.o

endif



cdns3-$(CONFIG_USB_CDNS3_GADGET)	+= gadget.o ep0.o trace.o

cdns3-$(CONFIG_USB_CDNS3_HOST)		+= host.o

obj-$(CONFIG_USB_CDNS3_PCI_WRAP)	+= cdns3-pci-wrap.o

drivers/usb/cdns3/cdns3-pci-wrap.c

deleted100644 → 0
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Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Cadence USBSS PCI Glue driver

 *

 * Copyright (C) 2018-2019 Cadence.

 *

 * Author: Pawel Laszczak <pawell@cadence.com>

 */



#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/pci.h>

#include <linux/platform_device.h>

#include <linux/dma-mapping.h>

#include <linux/slab.h>



struct cdns3_wrap {

	struct platform_device *plat_dev;

	struct pci_dev *hg_dev;

	struct resource dev_res[6];

};



#define RES_IRQ_HOST_ID		0

#define RES_IRQ_PERIPHERAL_ID	1

#define RES_IRQ_OTG_ID		2

#define RES_HOST_ID		3

#define RES_DEV_ID		4

#define RES_DRD_ID		5



#define PCI_BAR_HOST		0

#define PCI_BAR_DEV		2

#define PCI_BAR_OTG		4



#define PCI_DEV_FN_HOST_DEVICE	0

#define PCI_DEV_FN_OTG		1



#define PCI_DRIVER_NAME		"cdns3-pci-usbss"

#define PLAT_DRIVER_NAME	"cdns-usb3"



#define CDNS_VENDOR_ID		0x17cd

#define CDNS_DEVICE_ID		0x0100



static int cdns3_pci_probe(struct pci_dev *pdev,

			   const struct pci_device_id *id)

{

	struct platform_device_info plat_info;

	struct cdns3_wrap *wrap;

	struct resource *res;

	int err;



	/*

	 * for GADGET/HOST PCI (devfn) function number is 0,

	 * for OTG PCI (devfn) function number is 1

	 */

	if (!id || pdev->devfn != PCI_DEV_FN_HOST_DEVICE)

		return -EINVAL;



	err = pcim_enable_device(pdev);

	if (err) {

		dev_err(&pdev->dev, "Enabling PCI device has failed %d\n", err);

		return err;

	}



	pci_set_master(pdev);

	wrap = devm_kzalloc(&pdev->dev, sizeof(*wrap), GFP_KERNEL);

	if (!wrap) {

		pci_disable_device(pdev);

		return -ENOMEM;

	}



	/* function 0: host(BAR_0) + device(BAR_1) + otg(BAR_2)). */

	dev_dbg(&pdev->dev, "Initialize Device resources\n");

	res = wrap->dev_res;



	res[RES_DEV_ID].start = pci_resource_start(pdev, PCI_BAR_DEV);

	res[RES_DEV_ID].end =   pci_resource_end(pdev, PCI_BAR_DEV);

	res[RES_DEV_ID].name = "dev";

	res[RES_DEV_ID].flags = IORESOURCE_MEM;

	dev_dbg(&pdev->dev, "USBSS-DEV physical base addr: %pa\n",

		&res[RES_DEV_ID].start);



	res[RES_HOST_ID].start = pci_resource_start(pdev, PCI_BAR_HOST);

	res[RES_HOST_ID].end = pci_resource_end(pdev, PCI_BAR_HOST);

	res[RES_HOST_ID].name = "xhci";

	res[RES_HOST_ID].flags = IORESOURCE_MEM;

	dev_dbg(&pdev->dev, "USBSS-XHCI physical base addr: %pa\n",

		&res[RES_HOST_ID].start);



	res[RES_DRD_ID].start = pci_resource_start(pdev, PCI_BAR_OTG);

	res[RES_DRD_ID].end =   pci_resource_end(pdev, PCI_BAR_OTG);

	res[RES_DRD_ID].name = "otg";

	res[RES_DRD_ID].flags = IORESOURCE_MEM;

	dev_dbg(&pdev->dev, "USBSS-DRD physical base addr: %pa\n",

		&res[RES_DRD_ID].start);



	/* Interrupt for XHCI */

	wrap->dev_res[RES_IRQ_HOST_ID].start = pdev->irq;

	wrap->dev_res[RES_IRQ_HOST_ID].name = "host";

	wrap->dev_res[RES_IRQ_HOST_ID].flags = IORESOURCE_IRQ;



	/* Interrupt device. It's the same as for HOST. */

	wrap->dev_res[RES_IRQ_PERIPHERAL_ID].start = pdev->irq;

	wrap->dev_res[RES_IRQ_PERIPHERAL_ID].name = "peripheral";

	wrap->dev_res[RES_IRQ_PERIPHERAL_ID].flags = IORESOURCE_IRQ;



	/* Interrupt for OTG/DRD. */

	wrap->dev_res[RES_IRQ_OTG_ID].start = pdev->irq;

	wrap->dev_res[RES_IRQ_OTG_ID].name = "otg";

	wrap->dev_res[RES_IRQ_OTG_ID].flags = IORESOURCE_IRQ;



	/* set up platform device info */

	memset(&plat_info, 0, sizeof(plat_info));

	plat_info.parent = &pdev->dev;

	plat_info.fwnode = pdev->dev.fwnode;

	plat_info.name = PLAT_DRIVER_NAME;

	plat_info.id = pdev->devfn;

	plat_info.res = wrap->dev_res;

	plat_info.num_res = ARRAY_SIZE(wrap->dev_res);

	plat_info.dma_mask = pdev->dma_mask;



	/* register platform device */

	wrap->plat_dev = platform_device_register_full(&plat_info);

	if (IS_ERR(wrap->plat_dev)) {

		pci_disable_device(pdev);

		return PTR_ERR(wrap->plat_dev);

	}



	pci_set_drvdata(pdev, wrap);



	return err;

}



static void cdns3_pci_remove(struct pci_dev *pdev)

{

	struct cdns3_wrap *wrap = (struct cdns3_wrap *)pci_get_drvdata(pdev);



	platform_device_unregister(wrap->plat_dev);

}



static const struct pci_device_id cdns3_pci_ids[] = {

	{ PCI_DEVICE(CDNS_VENDOR_ID, CDNS_DEVICE_ID), },

	{ 0, }

};



static struct pci_driver cdns3_pci_driver = {

	.name = PCI_DRIVER_NAME,

	.id_table = cdns3_pci_ids,

	.probe = cdns3_pci_probe,

	.remove = cdns3_pci_remove,

};



module_pci_driver(cdns3_pci_driver);

MODULE_DEVICE_TABLE(pci, cdns3_pci_ids);



MODULE_AUTHOR("Pawel Laszczak <pawell@cadence.com>");

MODULE_LICENSE("GPL v2");

MODULE_DESCRIPTION("Cadence USBSS PCI wrapperr");

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