powerpc: Rewrite 4xx flush_cache_instruction() in C (de39b194) · Commits · 戴 / test

Nothing prevents flush_cache_instruction() from being writen in C. Do it to improve readability and maintainability. This function is very small and isn't called from assembly, make it static inline in asm/cacheflush.h Signed-off-by:

Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by:

Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/93d93fc69b4b3ad3ceba2fc0756333c0c0245bb7.1597384512.git.christophe.leroy@csgroup.eu

arch/powerpc/include/asm/cacheflush.h

+8 −0

Original line number	Diff line number	Diff line
		@@ -98,7 +98,15 @@ static inline void invalidate_dcache_range(unsigned long start,
		mb(); /* sync */
		}

		#ifdef CONFIG_4xx
		static inline void flush_instruction_cache(void)
		{
		iccci((void *)KERNELBASE);
		isync();
		}
		#else
		void flush_instruction_cache(void);
		#endif

		#include <asm-generic/cacheflush.h>

arch/powerpc/kernel/misc_32.S

+1 −6

Original line number	Diff line number	Diff line
		@@ -259,12 +259,8 @@ _ASM_NOKPROBE_SYMBOL(real_writeb)
		/*
		* Flush instruction cache.
		*/
		#if !defined(CONFIG_PPC_8xx) && !defined(CONFIG_PPC_BOOK3S_32)
		#ifdef CONFIG_FSL_BOOKE
		_GLOBAL(flush_instruction_cache)
		#if defined(CONFIG_4xx)
		lis r3, KERNELBASE@h
		iccci 0,r3
		#elif defined(CONFIG_FSL_BOOKE)
		#ifdef CONFIG_E200
		mfspr r3,SPRN_L1CSR0
		ori r3,r3,L1CSR0_CFI\|L1CSR0_CLFC
		@@ -276,7 +272,6 @@ _GLOBAL(flush_instruction_cache)
		mfspr r3,SPRN_L1CSR1
		ori r3,r3,L1CSR1_ICFI\|L1CSR1_ICLFR
		mtspr SPRN_L1CSR1,r3
		#endif /* CONFIG_4xx */
		isync
		blr
		EXPORT_SYMBOL(flush_instruction_cache)

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