Commit de25cfcb authored by Greg Ungerer's avatar Greg Ungerer
Browse files

m68k: remove old ColdFire IO access support code 



All the ColdFire IO access support code has been moved to io_no.h.
This means that all ColdFire support is at least now consistent no
matter whether the MMU is enabled or not for them.

Now that io_mm.h has reverted to only support the traditional m68k MMU
enabled processors we can remove the ColdFire specific definitions.

We can also remove the old ColdFire PCI bus IO access functions.
The new io_no.h uses asm-generic/io.h to provide all the basic support.

Signed-off-by: default avatarGreg Ungerer <gerg@linux-m68k.org>
Reviewed-by: default avatarAngelo Dureghello <angelo@sysam.it>
Tested-by: default avatarAngelo Dureghello <angelo@sysam.it>
parent dfbc5cb3

arch/m68k/coldfire/pci.c

+3 −96
Original line number Diff line number Diff line
@@ -23,20 +23,10 @@ 


/*

 * Memory and IO mappings. We use a 1:1 mapping for local host memory to

 * PCI bus memory (no reason not to really). IO space doesn't matter, we

 * always use access functions for that. The device configuration space is

 * mapped over the IO map space when we enable it in the PCICAR register.

 * PCI bus memory (no reason not to really). IO space is mapped in its own

 * separate address region. The device configuration space is mapped over

 * the IO map space when we enable it in the PCICAR register.

 */

#define	PCI_MEM_PA	0xf0000000		/* Host physical address */

#define	PCI_MEM_BA	0xf0000000		/* Bus physical address */

#define	PCI_MEM_SIZE	0x08000000		/* 128 MB */

#define	PCI_MEM_MASK	(PCI_MEM_SIZE - 1)



#define	PCI_IO_PA	0xf8000000		/* Host physical address */

#define	PCI_IO_BA	0x00000000		/* Bus physical address */

#define	PCI_IO_SIZE	0x00010000		/* 64k */

#define	PCI_IO_MASK	(PCI_IO_SIZE - 1)



static struct pci_bus *rootbus;

static unsigned long iospace;
@@ -143,89 +133,6 @@ static struct pci_ops mcf_pci_ops = { 
	.write	= mcf_pci_writeconfig,

};



/*

 *	IO address space access functions. Pretty strait forward, these are

 *	directly mapped in to the IO mapping window. And that is mapped into

 *	virtual address space.

 */

u8 mcf_pci_inb(u32 addr)

{

	return __raw_readb(iospace + (addr & PCI_IO_MASK));

}

EXPORT_SYMBOL(mcf_pci_inb);



u16 mcf_pci_inw(u32 addr)

{

	return le16_to_cpu(__raw_readw(iospace + (addr & PCI_IO_MASK)));

}

EXPORT_SYMBOL(mcf_pci_inw);



u32 mcf_pci_inl(u32 addr)

{

	return le32_to_cpu(__raw_readl(iospace + (addr & PCI_IO_MASK)));

}

EXPORT_SYMBOL(mcf_pci_inl);



void mcf_pci_insb(u32 addr, u8 *buf, u32 len)

{

	for (; len; len--)

		*buf++ = mcf_pci_inb(addr);

}

EXPORT_SYMBOL(mcf_pci_insb);



void mcf_pci_insw(u32 addr, u16 *buf, u32 len)

{

	for (; len; len--)

		*buf++ = mcf_pci_inw(addr);

}

EXPORT_SYMBOL(mcf_pci_insw);



void mcf_pci_insl(u32 addr, u32 *buf, u32 len)

{

	for (; len; len--)

		*buf++ = mcf_pci_inl(addr);

}

EXPORT_SYMBOL(mcf_pci_insl);



void mcf_pci_outb(u8 v, u32 addr)

{

	__raw_writeb(v, iospace + (addr & PCI_IO_MASK));

}

EXPORT_SYMBOL(mcf_pci_outb);



void mcf_pci_outw(u16 v, u32 addr)

{

	__raw_writew(cpu_to_le16(v), iospace + (addr & PCI_IO_MASK));

}

EXPORT_SYMBOL(mcf_pci_outw);



void mcf_pci_outl(u32 v, u32 addr)

{

	__raw_writel(cpu_to_le32(v), iospace + (addr & PCI_IO_MASK));

}

EXPORT_SYMBOL(mcf_pci_outl);



void mcf_pci_outsb(u32 addr, const u8 *buf, u32 len)

{

	for (; len; len--)

		mcf_pci_outb(*buf++, addr);

}

EXPORT_SYMBOL(mcf_pci_outsb);



void mcf_pci_outsw(u32 addr, const u16 *buf, u32 len)

{

	for (; len; len--)

		mcf_pci_outw(*buf++, addr);

}

EXPORT_SYMBOL(mcf_pci_outsw);



void mcf_pci_outsl(u32 addr, const u32 *buf, u32 len)

{

	for (; len; len--)

		mcf_pci_outl(*buf++, addr);

}

EXPORT_SYMBOL(mcf_pci_outsl);



/*

 * Initialize the PCI bus registers, and scan the bus.

 */

arch/m68k/include/asm/io_mm.h

+2 −49
Original line number Diff line number Diff line
@@ -86,53 +86,7 @@ 
#endif /* ATARI_ROM_ISA */





#if defined(CONFIG_PCI) && defined(CONFIG_COLDFIRE)



#define HAVE_ARCH_PIO_SIZE

#define PIO_OFFSET	0

#define PIO_MASK	0xffff

#define PIO_RESERVED	0x10000



u8 mcf_pci_inb(u32 addr);

u16 mcf_pci_inw(u32 addr);

u32 mcf_pci_inl(u32 addr);

void mcf_pci_insb(u32 addr, u8 *buf, u32 len);

void mcf_pci_insw(u32 addr, u16 *buf, u32 len);

void mcf_pci_insl(u32 addr, u32 *buf, u32 len);



void mcf_pci_outb(u8 v, u32 addr);

void mcf_pci_outw(u16 v, u32 addr);

void mcf_pci_outl(u32 v, u32 addr);

void mcf_pci_outsb(u32 addr, const u8 *buf, u32 len);

void mcf_pci_outsw(u32 addr, const u16 *buf, u32 len);

void mcf_pci_outsl(u32 addr, const u32 *buf, u32 len);



#define	inb	mcf_pci_inb

#define	inb_p	mcf_pci_inb

#define	inw	mcf_pci_inw

#define	inw_p	mcf_pci_inw

#define	inl	mcf_pci_inl

#define	inl_p	mcf_pci_inl

#define	insb	mcf_pci_insb

#define	insw	mcf_pci_insw

#define	insl	mcf_pci_insl



#define	outb	mcf_pci_outb

#define	outb_p	mcf_pci_outb

#define	outw	mcf_pci_outw

#define	outw_p	mcf_pci_outw

#define	outl	mcf_pci_outl

#define	outl_p	mcf_pci_outl

#define	outsb	mcf_pci_outsb

#define	outsw	mcf_pci_outsw

#define	outsl	mcf_pci_outsl



#define readb(addr)	in_8(addr)

#define writeb(v, addr)	out_8((addr), (v))

#define readw(addr)	in_le16(addr)

#define writew(v, addr)	out_le16((addr), (v))



#elif defined(CONFIG_ISA) || defined(CONFIG_ATARI_ROM_ISA)

#if defined(CONFIG_ISA) || defined(CONFIG_ATARI_ROM_ISA)



#if MULTI_ISA == 0

#undef MULTI_ISA
@@ -415,8 +369,7 @@ static inline void isa_delay(void) 
#define writew(val, addr)	out_le16((addr), (val))

#endif /* CONFIG_ATARI_ROM_ISA */



#if !defined(CONFIG_ISA) && !defined(CONFIG_ATARI_ROM_ISA) && \

    !(defined(CONFIG_PCI) && defined(CONFIG_COLDFIRE))

#if !defined(CONFIG_ISA) && !defined(CONFIG_ATARI_ROM_ISA)

/*

 * We need to define dummy functions for GENERIC_IOMAP support.

 */

CRA Git | Maintained and supported by SUSTech CRA and CCSE