Commit de25bcc4 authored by Huazhong Tan's avatar Huazhong Tan Committed by Jakub Kicinski
Browse files

net: hns3: rename gl_adapt_enable in struct hns3_enet_coalesce 



Besides GL(Gap Limiting), QL(Quantity Limiting) can be modified
dynamically when DIM is supported. So rename gl_adapt_enable as
adapt_enable in struct hns3_enet_coalesce.

Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 5ac84b02

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

+6 −6
Original line number Diff line number Diff line
@@ -211,8 +211,8 @@ void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector, 
	 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing

	 */



	if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&

	    !tqp_vector->rx_group.coal.gl_adapt_enable)

	if (rl_reg > 0 && !tqp_vector->tx_group.coal.adapt_enable &&

	    !tqp_vector->rx_group.coal.adapt_enable)

		/* According to the hardware, the range of rl_reg is

		 * 0-59 and the unit is 4.

		 */
@@ -273,8 +273,8 @@ static void hns3_vector_coalesce_init(struct hns3_enet_tqp_vector *tqp_vector, 
	 *

	 * Default: enable interrupt coalescing self-adaptive and GL

	 */

	tx_coal->gl_adapt_enable = 1;

	rx_coal->gl_adapt_enable = 1;

	tx_coal->adapt_enable = 1;

	rx_coal->adapt_enable = 1;



	tx_coal->int_gl = HNS3_INT_GL_50K;

	rx_coal->int_gl = HNS3_INT_GL_50K;
@@ -3384,14 +3384,14 @@ static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector) 
			tqp_vector->last_jiffies + msecs_to_jiffies(1000)))

		return;



	if (rx_group->coal.gl_adapt_enable) {

	if (rx_group->coal.adapt_enable) {

		rx_update = hns3_get_new_int_gl(rx_group);

		if (rx_update)

			hns3_set_vector_coalesce_rx_gl(tqp_vector,

						       rx_group->coal.int_gl);

	}



	if (tx_group->coal.gl_adapt_enable) {

	if (tx_group->coal.adapt_enable) {

		tx_update = hns3_get_new_int_gl(tx_group);

		if (tx_update)

			hns3_set_vector_coalesce_tx_gl(tqp_vector,

drivers/net/ethernet/hisilicon/hns3/hns3_enet.h

+1 −1
Original line number Diff line number Diff line
@@ -436,7 +436,7 @@ struct hns3_enet_coalesce { 
	u16 int_gl;

	u16 int_ql;

	u16 int_ql_max;

	u8 gl_adapt_enable:1;

	u8 adapt_enable:1;

	u8 ql_enable:1;

	u8 unit_1us:1;

	enum hns3_flow_level_range flow_level;

drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c

+4 −4
Original line number Diff line number Diff line
@@ -1105,9 +1105,9 @@ static int hns3_get_coalesce_per_queue(struct net_device *netdev, u32 queue, 
	rx_vector = priv->ring[queue_num + queue].tqp_vector;



	cmd->use_adaptive_tx_coalesce =

			tx_vector->tx_group.coal.gl_adapt_enable;

			tx_vector->tx_group.coal.adapt_enable;

	cmd->use_adaptive_rx_coalesce =

			rx_vector->rx_group.coal.gl_adapt_enable;

			rx_vector->rx_group.coal.adapt_enable;



	cmd->tx_coalesce_usecs = tx_vector->tx_group.coal.int_gl;

	cmd->rx_coalesce_usecs = rx_vector->rx_group.coal.int_gl;
@@ -1268,9 +1268,9 @@ static void hns3_set_coalesce_per_queue(struct net_device *netdev, 
	tx_vector = priv->ring[queue].tqp_vector;

	rx_vector = priv->ring[queue_num + queue].tqp_vector;



	tx_vector->tx_group.coal.gl_adapt_enable =

	tx_vector->tx_group.coal.adapt_enable =

				cmd->use_adaptive_tx_coalesce;

	rx_vector->rx_group.coal.gl_adapt_enable =

	rx_vector->rx_group.coal.adapt_enable =

				cmd->use_adaptive_rx_coalesce;



	tx_vector->tx_group.coal.int_gl = cmd->tx_coalesce_usecs;

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