Commit ddae74ac authored by Or Gerlitz's avatar Or Gerlitz Committed by Saeed Mahameed
Browse files

net/mlx5: Vectorize the low level core hairpin object 



Enhance the hairpin setup code at the core to support a set of N
(RQ,SQ) pairs. This will be later used by the caller to set RSS
spreading among the different RQs.

Signed-off-by: default avatarOr Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent 479f074c

drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

+3 −3
Original line number Diff line number Diff line
@@ -269,7 +269,7 @@ static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp) 
	tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);



	MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);

	MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn);

	MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);

	MLX5_SET(tirc, tirc, transport_domain, hp->tdn);



	err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn);
@@ -440,8 +440,8 @@ static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv, 
	}



	netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d log data size %d\n",

		   hp->tirn, hp->pair->rqn, hp->pair->peer_mdev->priv.name,

		   hp->pair->sqn, match_prio, params.log_data_size);

		   hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name,

		   hp->pair->sqn[0], match_prio, params.log_data_size);



	hpe->hp = hp;

	hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,

drivers/net/ethernet/mellanox/mlx5/core/transobj.c

+61 −33
Original line number Diff line number Diff line
@@ -437,28 +437,40 @@ static int mlx5_hairpin_create_sq(struct mlx5_core_dev *mdev, 
static int mlx5_hairpin_create_queues(struct mlx5_hairpin *hp,

				      struct mlx5_hairpin_params *params)

{

	int err;

	int i, j, err;



	err = mlx5_hairpin_create_rq(hp->func_mdev, params, &hp->rqn);

	for (i = 0; i < hp->num_channels; i++) {

		err = mlx5_hairpin_create_rq(hp->func_mdev, params, &hp->rqn[i]);

		if (err)

			goto out_err_rq;

	}



	err = mlx5_hairpin_create_sq(hp->peer_mdev, params, &hp->sqn);

	for (i = 0; i < hp->num_channels; i++) {

		err = mlx5_hairpin_create_sq(hp->peer_mdev, params, &hp->sqn[i]);

		if (err)

			goto out_err_sq;

	}



	return 0;



out_err_sq:

	mlx5_core_destroy_rq(hp->func_mdev, hp->rqn);

	for (j = 0; j < i; j++)

		mlx5_core_destroy_sq(hp->peer_mdev, hp->sqn[j]);

	i = hp->num_channels;

out_err_rq:

	for (j = 0; j < i; j++)

		mlx5_core_destroy_rq(hp->func_mdev, hp->rqn[j]);

	return err;

}



static void mlx5_hairpin_destroy_queues(struct mlx5_hairpin *hp)

{

	mlx5_core_destroy_rq(hp->func_mdev, hp->rqn);

	mlx5_core_destroy_sq(hp->peer_mdev, hp->sqn);

	int i;



	for (i = 0; i < hp->num_channels; i++) {

		mlx5_core_destroy_rq(hp->func_mdev, hp->rqn[i]);

		mlx5_core_destroy_sq(hp->peer_mdev, hp->sqn[i]);

	}

}



static int mlx5_hairpin_modify_rq(struct mlx5_core_dev *func_mdev, u32 rqn,
@@ -505,40 +517,52 @@ static int mlx5_hairpin_modify_sq(struct mlx5_core_dev *peer_mdev, u32 sqn, 


static int mlx5_hairpin_pair_queues(struct mlx5_hairpin *hp)

{

	int err;

	int i, j, err;



	/* set peer SQ */

	err = mlx5_hairpin_modify_sq(hp->peer_mdev, hp->sqn,

	/* set peer SQs */

	for (i = 0; i < hp->num_channels; i++) {

		err = mlx5_hairpin_modify_sq(hp->peer_mdev, hp->sqn[i],

					     MLX5_SQC_STATE_RST, MLX5_SQC_STATE_RDY,

				     MLX5_CAP_GEN(hp->func_mdev, vhca_id), hp->rqn);

					     MLX5_CAP_GEN(hp->func_mdev, vhca_id), hp->rqn[i]);

		if (err)

			goto err_modify_sq;

	}



	/* set func RQ */

	err = mlx5_hairpin_modify_rq(hp->func_mdev, hp->rqn,

	/* set func RQs */

	for (i = 0; i < hp->num_channels; i++) {

		err = mlx5_hairpin_modify_rq(hp->func_mdev, hp->rqn[i],

					     MLX5_RQC_STATE_RST, MLX5_RQC_STATE_RDY,

				     MLX5_CAP_GEN(hp->peer_mdev, vhca_id), hp->sqn);



					     MLX5_CAP_GEN(hp->peer_mdev, vhca_id), hp->sqn[i]);

		if (err)

			goto err_modify_rq;

	}



	return 0;



err_modify_rq:

	mlx5_hairpin_modify_sq(hp->peer_mdev, hp->sqn, MLX5_SQC_STATE_RDY,

			       MLX5_SQC_STATE_RST, 0, 0);

	for (j = 0; j < i; j++)

		mlx5_hairpin_modify_rq(hp->func_mdev, hp->rqn[j], MLX5_RQC_STATE_RDY,

				       MLX5_RQC_STATE_RST, 0, 0);

	i = hp->num_channels;

err_modify_sq:

	for (j = 0; j < i; j++)

		mlx5_hairpin_modify_sq(hp->peer_mdev, hp->sqn[j], MLX5_SQC_STATE_RDY,

				       MLX5_SQC_STATE_RST, 0, 0);

	return err;

}



static void mlx5_hairpin_unpair_queues(struct mlx5_hairpin *hp)

{

	/* unset func RQ */

	mlx5_hairpin_modify_rq(hp->func_mdev, hp->rqn, MLX5_RQC_STATE_RDY,

	int i;



	/* unset func RQs */

	for (i = 0; i < hp->num_channels; i++)

		mlx5_hairpin_modify_rq(hp->func_mdev, hp->rqn[i], MLX5_RQC_STATE_RDY,

				       MLX5_RQC_STATE_RST, 0, 0);



	/* unset peer SQ */

	mlx5_hairpin_modify_sq(hp->peer_mdev, hp->sqn, MLX5_SQC_STATE_RDY,

	/* unset peer SQs */

	for (i = 0; i < hp->num_channels; i++)

		mlx5_hairpin_modify_sq(hp->peer_mdev, hp->sqn[i], MLX5_SQC_STATE_RDY,

				       MLX5_SQC_STATE_RST, 0, 0);

}
@@ -550,13 +574,17 @@ mlx5_core_hairpin_create(struct mlx5_core_dev *func_mdev, 
	struct mlx5_hairpin *hp;

	int size, err;



	size = sizeof(*hp);

	size = sizeof(*hp) + params->num_channels * 2 * sizeof(u32);

	hp = kzalloc(size, GFP_KERNEL);

	if (!hp)

		return ERR_PTR(-ENOMEM);



	hp->func_mdev = func_mdev;

	hp->peer_mdev = peer_mdev;

	hp->num_channels = params->num_channels;



	hp->rqn = (void *)hp + sizeof(*hp);

	hp->sqn = hp->rqn + params->num_channels;



	/* alloc and pair func --> peer hairpin */

	err = mlx5_hairpin_create_queues(hp, params);

include/linux/mlx5/transobj.h

+5 −2
Original line number Diff line number Diff line
@@ -78,14 +78,17 @@ void mlx5_core_destroy_rqt(struct mlx5_core_dev *dev, u32 rqtn); 
struct mlx5_hairpin_params {

	u8  log_data_size;

	u16 q_counter;

	int num_channels;

};



struct mlx5_hairpin {

	struct mlx5_core_dev *func_mdev;

	struct mlx5_core_dev *peer_mdev;



	u32 rqn;

	u32 sqn;

	int num_channels;



	u32 *rqn;

	u32 *sqn;

};



struct mlx5_hairpin *

CRA Git | Maintained and supported by SUSTech CRA and CCSE