Commit dd7de4c0 authored Apr 16, 2020 by Alexandre Belloni Committed by Jonathan Cameron Apr 19, 2020

iio: adc: ti-ads8344: properly byte swap value



The first received byte is the MSB, followed by the LSB so the value needs
to be byte swapped.

Also, the ADC actually has a delay of one clock on the SPI bus. Read three
bytes to get the last bit.

Fixes: 8dd2d7c0 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

parent 0a2bf920

drivers/iio/adc/ti-ads8344.c

+3 −3

Original line number	Diff line number	Diff line
		@@ -29,7 +29,7 @@ struct ads8344 {
		struct mutex lock;

		u8 tx_buf ____cacheline_aligned;
		u16 rx_buf;
		u8 rx_buf[3];
		};

		#define ADS8344_VOLTAGE_CHANNEL(chan, si) \
		@@ -89,11 +89,11 @@ static int ads8344_adc_conversion(struct ads8344 *adc, int channel,

		udelay(9);

		ret = spi_read(spi, &adc->rx_buf, 2);
		ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf));
		if (ret)
		return ret;

		return adc->rx_buf;
		return adc->rx_buf[0] << 9 \| adc->rx_buf[1] << 1 \| adc->rx_buf[2] >> 7;
		}

		static int ads8344_read_raw(struct iio_dev *iio,

Admin message