Commit dd59aed7 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'tegra-for-5.10-arm64-dt' of...

Merge tag 'tegra-for-5.10-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Changes for v5.10-rc1

This set of changes fixes some minor issues in existing device trees and
adds ID EEPROMs on the Jetson Xavier NX. All ID EEPROMs are now labelled
to allow them to be detected by software.

It also adds support for the Tegra234 VDK board, which is a pre-silicon
platform for the upcoming Orin SoC.

* tag 'tegra-for-5.10-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Initial Tegra234 VDK support
  arm64: tegra: Populate EEPROMs for Jetson Xavier NX
  arm64: tegra: Add label properties for EEPROMs
  arm64: tegra: Add DT binding for AHUB components
  arm64: tegra: Enable ACONNECT, ADMA and AGIC on Jetson Nano
  arm64: tegra: Properly size register regions for GPU on Tegra194
  arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210
  arm64: tegra: Describe display controller outputs for Tegra210
  arm64: tegra: Disable SD card write-protection on Jetson Nano
  arm64: tegra: Add VBUS supply for micro USB port on Jetson Nano
  arm64: tegra: Wire up pinctrl states for all DPAUX controllers
  arm64: tegra: Add ID EEPROMs on Jetson AGX Xavier

Link: https://lore.kernel.org/r/20200918150303.3938852-5-thierry.reding@gmail.com


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 61d5d791 63944891
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@@ -9,3 +9,4 @@ dtb-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-p2894-0050-a08.dtb
dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p2771-0000.dtb
dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
+1 −0
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@@ -222,6 +222,7 @@
			compatible = "atmel,24c02";
			reg = <0x57>;

			label = "system";
			vcc-supply = <&vdd_1v8>;
			address-width = <8>;
			pagesize = <8>;
+1 −0
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@@ -173,6 +173,7 @@
			compatible = "atmel,24c02";
			reg = <0x50>;

			label = "module";
			vcc-supply = <&vdd_1v8>;
			address-width = <8>;
			pagesize = <8>;
+216 −1
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@@ -85,7 +85,7 @@
		ranges = <0x02900000 0x0 0x02900000 0x200000>;
		status = "disabled";

		dma-controller@2930000 {
		adma: dma-controller@2930000 {
			compatible = "nvidia,tegra186-adma";
			reg = <0x02930000 0x20000>;
			interrupt-parent = <&agic>;
@@ -140,6 +140,221 @@
			clock-names = "clk";
			status = "disabled";
		};

		tegra_ahub: ahub@2900800 {
			compatible = "nvidia,tegra186-ahub";
			reg = <0x02900800 0x800>;
			clocks = <&bpmp TEGRA186_CLK_AHUB>;
			clock-names = "ahub";
			assigned-clocks = <&bpmp TEGRA186_CLK_AHUB>;
			assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x02900800 0x02900800 0x11800>;
			status = "disabled";

			tegra_admaif: admaif@290f000 {
				compatible = "nvidia,tegra186-admaif";
				reg = <0x0290f000 0x1000>;
				dmas = <&adma 1>, <&adma 1>,
				       <&adma 2>, <&adma 2>,
				       <&adma 3>, <&adma 3>,
				       <&adma 4>, <&adma 4>,
				       <&adma 5>, <&adma 5>,
				       <&adma 6>, <&adma 6>,
				       <&adma 7>, <&adma 7>,
				       <&adma 8>, <&adma 8>,
				       <&adma 9>, <&adma 9>,
				       <&adma 10>, <&adma 10>,
				       <&adma 11>, <&adma 11>,
				       <&adma 12>, <&adma 12>,
				       <&adma 13>, <&adma 13>,
				       <&adma 14>, <&adma 14>,
				       <&adma 15>, <&adma 15>,
				       <&adma 16>, <&adma 16>,
				       <&adma 17>, <&adma 17>,
				       <&adma 18>, <&adma 18>,
				       <&adma 19>, <&adma 19>,
				       <&adma 20>, <&adma 20>;
				dma-names = "rx1", "tx1",
					    "rx2", "tx2",
					    "rx3", "tx3",
					    "rx4", "tx4",
					    "rx5", "tx5",
					    "rx6", "tx6",
					    "rx7", "tx7",
					    "rx8", "tx8",
					    "rx9", "tx9",
					    "rx10", "tx10",
					    "rx11", "tx11",
					    "rx12", "tx12",
					    "rx13", "tx13",
					    "rx14", "tx14",
					    "rx15", "tx15",
					    "rx16", "tx16",
					    "rx17", "tx17",
					    "rx18", "tx18",
					    "rx19", "tx19",
					    "rx20", "tx20";
				status = "disabled";
			};

			tegra_i2s1: i2s@2901000 {
				compatible = "nvidia,tegra186-i2s",
					     "nvidia,tegra210-i2s";
				reg = <0x2901000 0x100>;
				clocks = <&bpmp TEGRA186_CLK_I2S1>,
					 <&bpmp TEGRA186_CLK_I2S1_SYNC_INPUT>;
				clock-names = "i2s", "sync_input";
				assigned-clocks = <&bpmp TEGRA186_CLK_I2S1>;
				assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
				assigned-clock-rates = <1536000>;
				sound-name-prefix = "I2S1";
				status = "disabled";
			};

			tegra_i2s2: i2s@2901100 {
				compatible = "nvidia,tegra186-i2s",
					     "nvidia,tegra210-i2s";
				reg = <0x2901100 0x100>;
				clocks = <&bpmp TEGRA186_CLK_I2S2>,
					 <&bpmp TEGRA186_CLK_I2S2_SYNC_INPUT>;
				clock-names = "i2s", "sync_input";
				assigned-clocks = <&bpmp TEGRA186_CLK_I2S2>;
				assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
				assigned-clock-rates = <1536000>;
				sound-name-prefix = "I2S2";
				status = "disabled";
			};

			tegra_i2s3: i2s@2901200 {
				compatible = "nvidia,tegra186-i2s",
					     "nvidia,tegra210-i2s";
				reg = <0x2901200 0x100>;
				clocks = <&bpmp TEGRA186_CLK_I2S3>,
					 <&bpmp TEGRA186_CLK_I2S3_SYNC_INPUT>;
				clock-names = "i2s", "sync_input";
				assigned-clocks = <&bpmp TEGRA186_CLK_I2S3>;
				assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
				assigned-clock-rates = <1536000>;
				sound-name-prefix = "I2S3";
				status = "disabled";
			};

			tegra_i2s4: i2s@2901300 {
				compatible = "nvidia,tegra186-i2s",
					     "nvidia,tegra210-i2s";
				reg = <0x2901300 0x100>;
				clocks = <&bpmp TEGRA186_CLK_I2S4>,
					 <&bpmp TEGRA186_CLK_I2S4_SYNC_INPUT>;
				clock-names = "i2s", "sync_input";
				assigned-clocks = <&bpmp TEGRA186_CLK_I2S4>;
				assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
				assigned-clock-rates = <1536000>;
				sound-name-prefix = "I2S4";
				status = "disabled";
			};

			tegra_i2s5: i2s@2901400 {
				compatible = "nvidia,tegra186-i2s",
					     "nvidia,tegra210-i2s";
				reg = <0x2901400 0x100>;
				clocks = <&bpmp TEGRA186_CLK_I2S5>,
					 <&bpmp TEGRA186_CLK_I2S5_SYNC_INPUT>;
				clock-names = "i2s", "sync_input";
				assigned-clocks = <&bpmp TEGRA186_CLK_I2S5>;
				assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
				assigned-clock-rates = <1536000>;
				sound-name-prefix = "I2S5";
				status = "disabled";
			};

			tegra_i2s6: i2s@2901500 {
				compatible = "nvidia,tegra186-i2s",
					     "nvidia,tegra210-i2s";
				reg = <0x2901500 0x100>;
				clocks = <&bpmp TEGRA186_CLK_I2S6>,
					 <&bpmp TEGRA186_CLK_I2S6_SYNC_INPUT>;
				clock-names = "i2s", "sync_input";
				assigned-clocks = <&bpmp TEGRA186_CLK_I2S6>;
				assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
				assigned-clock-rates = <1536000>;
				sound-name-prefix = "I2S6";
				status = "disabled";
			};

			tegra_dmic1: dmic@2904000 {
				compatible = "nvidia,tegra210-dmic";
				reg = <0x2904000 0x100>;
				clocks = <&bpmp TEGRA186_CLK_DMIC1>;
				clock-names = "dmic";
				assigned-clocks = <&bpmp TEGRA186_CLK_DMIC1>;
				assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
				assigned-clock-rates = <3072000>;
				sound-name-prefix = "DMIC1";
				status = "disabled";
			};

			tegra_dmic2: dmic@2904100 {
				compatible = "nvidia,tegra210-dmic";
				reg = <0x2904100 0x100>;
				clocks = <&bpmp TEGRA186_CLK_DMIC2>;
				clock-names = "dmic";
				assigned-clocks = <&bpmp TEGRA186_CLK_DMIC2>;
				assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
				assigned-clock-rates = <3072000>;
				sound-name-prefix = "DMIC2";
				status = "disabled";
			};

			tegra_dmic3: dmic@2904200 {
				compatible = "nvidia,tegra210-dmic";
				reg = <0x2904200 0x100>;
				clocks = <&bpmp TEGRA186_CLK_DMIC3>;
				clock-names = "dmic";
				assigned-clocks = <&bpmp TEGRA186_CLK_DMIC3>;
				assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
				assigned-clock-rates = <3072000>;
				sound-name-prefix = "DMIC3";
				status = "disabled";
			};

			tegra_dmic4: dmic@2904300 {
				compatible = "nvidia,tegra210-dmic";
				reg = <0x2904300 0x100>;
				clocks = <&bpmp TEGRA186_CLK_DMIC4>;
				clock-names = "dmic";
				assigned-clocks = <&bpmp TEGRA186_CLK_DMIC4>;
				assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
				assigned-clock-rates = <3072000>;
				sound-name-prefix = "DMIC4";
				status = "disabled";
			};

			tegra_dspk1: dspk@2905000 {
				compatible = "nvidia,tegra186-dspk";
				reg = <0x2905000 0x100>;
				clocks = <&bpmp TEGRA186_CLK_DSPK1>;
				clock-names = "dspk";
				assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
				assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
				assigned-clock-rates = <12288000>;
				sound-name-prefix = "DSPK1";
				status = "disabled";
			};

			tegra_dspk2: dspk@2905100 {
				compatible = "nvidia,tegra186-dspk";
				reg = <0x2905100 0x100>;
				clocks = <&bpmp TEGRA186_CLK_DSPK2>;
				clock-names = "dspk";
				assigned-clocks = <&bpmp TEGRA186_CLK_DSPK2>;
				assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
				assigned-clock-rates = <12288000>;
				sound-name-prefix = "DSPK2";
				status = "disabled";
			};
		};
	};

	mc: memory-controller@2c00000 {
+16 −0
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@@ -57,6 +57,22 @@
			status = "okay";
		};

		i2c@3160000 {
			status = "okay";

			eeprom@50 {
				compatible = "atmel,24c02";
				reg = <0x50>;

				label = "module";
				vcc-supply = <&vdd_1v8ls>;
				address-width = <8>;
				pagesize = <8>;
				size = <256>;
				read-only;
			};
		};

		/* SDMMC1 (SD/MMC) */
		mmc@3400000 {
			cd-gpios = <&gpio TEGRA194_MAIN_GPIO(A, 0) GPIO_ACTIVE_LOW>;
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