Commit dd54bb8a authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Wei Xu
Browse files

arm64: dts: hisilicon: hi3670: Add UART nodes 



Add UART nodes for HiSilicon HI3670 SoC and also relevant pinmux/pinconf
entries.

Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarWei Xu <xuwei5@hisilicon.com>
parent e1881302

arch/arm64/boot/dts/hisilicon/hi3670.dtsi

+72 −0
Original line number Diff line number Diff line
@@ -187,6 +187,76 @@ 
			#clock-cells = <1>;

		};



		uart0: serial@fdf02000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x0 0xfdf02000 0x0 0x1000>;

			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg_ctrl HI3670_CLK_GATE_UART0>,

				 <&crg_ctrl HI3670_PCLK>;

			clock-names = "uartclk", "apb_pclk";

			pinctrl-names = "default";

			pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;

			status = "disabled";

		};



		uart1: serial@fdf00000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x0 0xfdf00000 0x0 0x1000>;

			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg_ctrl HI3670_CLK_GATE_UART1>,

				 <&crg_ctrl HI3670_PCLK>;

			clock-names = "uartclk", "apb_pclk";

			pinctrl-names = "default";

			status = "disabled";

		};



		uart2: serial@fdf03000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x0 0xfdf03000 0x0 0x1000>;

			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg_ctrl HI3670_CLK_GATE_UART2>,

				 <&crg_ctrl HI3670_PCLK>;

			clock-names = "uartclk", "apb_pclk";

			pinctrl-names = "default";

			pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;

			status = "disabled";

		};



		uart3: serial@ffd74000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x0 0xffd74000 0x0 0x1000>;

			interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg_ctrl HI3670_CLK_GATE_UART3>,

				 <&crg_ctrl HI3670_PCLK>;

			clock-names = "uartclk", "apb_pclk";

			pinctrl-names = "default";

			pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;

			status = "disabled";

		};



		uart4: serial@fdf01000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x0 0xfdf01000 0x0 0x1000>;

			interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg_ctrl HI3670_CLK_GATE_UART4>,

				 <&crg_ctrl HI3670_PCLK>;

			clock-names = "uartclk", "apb_pclk";

			pinctrl-names = "default";

			pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;

			status = "disabled";

		};



		uart5: serial@fdf05000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x0 0xfdf05000 0x0 0x1000>;

			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg_ctrl HI3670_CLK_GATE_UART5>,

				 <&crg_ctrl HI3670_PCLK>;

			clock-names = "uartclk", "apb_pclk";

			pinctrl-names = "default";

			status = "disabled";

		};



		uart6: serial@fff32000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x0 0xfff32000 0x0 0x1000>;
@@ -194,6 +264,8 @@ 
			clocks = <&crg_ctrl HI3670_CLK_UART6>,

				 <&crg_ctrl HI3670_PCLK>;

			clock-names = "uartclk", "apb_pclk";

			pinctrl-names = "default";

			pinctrl-0 = <&uart6_pmx_func &uart6_cfg_func>;

			status = "disabled";

		};

arch/arm64/boot/dts/hisilicon/hikey970-pinctrl.dtsi

+157 −0
Original line number Diff line number Diff line
@@ -20,6 +20,47 @@ 
			pinctrl-single,function-mask = <0x7>;

			/* pin base, nr pins & gpio function */

			pinctrl-single,gpio-range = <&range 0 82 0>;



			uart0_pmx_func: uart0_pmx_func {

				pinctrl-single,pins = <

					0x054 MUX_M2 /* UART0_RXD */

					0x058 MUX_M2 /* UART0_TXD */

				>;

			};



			uart2_pmx_func: uart2_pmx_func {

				pinctrl-single,pins = <

					0x700 MUX_M2 /* UART2_CTS_N */

					0x704 MUX_M2 /* UART2_RTS_N */

					0x708 MUX_M2 /* UART2_RXD */

					0x70c MUX_M2 /* UART2_TXD */

				>;

			};



			uart3_pmx_func: uart3_pmx_func {

				pinctrl-single,pins = <

					0x064 MUX_M1 /* UART3_CTS_N */

					0x068 MUX_M1 /* UART3_RTS_N */

					0x06c MUX_M1 /* UART3_RXD */

					0x070 MUX_M1 /* UART3_TXD */

				>;

			};



			uart4_pmx_func: uart4_pmx_func {

				pinctrl-single,pins = <

					0x074 MUX_M1 /* UART4_CTS_N */

					0x078 MUX_M1 /* UART4_RTS_N */

					0x07c MUX_M1 /* UART4_RXD */

					0x080 MUX_M1 /* UART4_TXD */

				>;

			};



			uart6_pmx_func: uart6_pmx_func {

				pinctrl-single,pins = <

					0x05c MUX_M1 /* UART6_RXD */

					0x060 MUX_M1 /* UART6_TXD */

				>;

			};

		};



		pmx2: pinmux@e896c800 {
@@ -27,6 +68,122 @@ 
			reg = <0x0 0xe896c800 0x0 0x72c>;

			#pinctrl-cells = <1>;

			pinctrl-single,register-width = <0x20>;



			uart0_cfg_func: uart0_cfg_func {

				pinctrl-single,pins = <

					0x058 0x0 /* UART0_RXD */

					0x05c 0x0 /* UART0_TXD */

				>;

				pinctrl-single,bias-pulldown = <

					PULL_DIS

					PULL_DOWN

					PULL_DIS

					PULL_DOWN

				>;

				pinctrl-single,bias-pullup = <

					PULL_DIS

					PULL_UP

					PULL_DIS

					PULL_UP

				>;

				pinctrl-single,drive-strength = <

					DRIVE7_04MA DRIVE6_MASK

				>;

			};



			uart2_cfg_func: uart2_cfg_func {

				pinctrl-single,pins = <

					0x700 0x0 /* UART2_CTS_N */

					0x704 0x0 /* UART2_RTS_N */

					0x708 0x0 /* UART2_RXD */

					0x70c 0x0 /* UART2_TXD */

				>;

				pinctrl-single,bias-pulldown = <

					PULL_DIS

					PULL_DOWN

					PULL_DIS

					PULL_DOWN

				>;

				pinctrl-single,bias-pullup = <

					PULL_DIS

					PULL_UP

					PULL_DIS

					PULL_UP

				>;

				pinctrl-single,drive-strength = <

					DRIVE7_04MA DRIVE6_MASK

				>;

			};



			uart3_cfg_func: uart3_cfg_func {

				pinctrl-single,pins = <

					0x068 0x0 /* UART3_CTS_N */

					0x06c 0x0 /* UART3_RTS_N */

					0x070 0x0 /* UART3_RXD */

					0x074 0x0 /* UART3_TXD */

				>;

				pinctrl-single,bias-pulldown = <

					PULL_DIS

					PULL_DOWN

					PULL_DIS

					PULL_DOWN

				>;

				pinctrl-single,bias-pullup = <

					PULL_DIS

					PULL_UP

					PULL_DIS

					PULL_UP

				>;

				pinctrl-single,drive-strength = <

					DRIVE7_04MA DRIVE6_MASK

				>;

			};



			uart4_cfg_func: uart4_cfg_func {

				pinctrl-single,pins = <

					0x078 0x0 /* UART4_CTS_N */

					0x07c 0x0 /* UART4_RTS_N */

					0x080 0x0 /* UART4_RXD */

					0x084 0x0 /* UART4_TXD */

				>;

				pinctrl-single,bias-pulldown = <

					PULL_DIS

					PULL_DOWN

					PULL_DIS

					PULL_DOWN

				>;

				pinctrl-single,bias-pullup = <

					PULL_DIS

					PULL_UP

					PULL_DIS

					PULL_UP

				>;

				pinctrl-single,drive-strength = <

					DRIVE7_04MA DRIVE6_MASK

				>;

			};



			uart6_cfg_func: uart6_cfg_func {

				pinctrl-single,pins = <

					0x060 0x0 /* UART6_RXD */

					0x064 0x0 /* UART6_TXD */

				>;

				pinctrl-single,bias-pulldown = <

					PULL_DIS

					PULL_DOWN

					PULL_DIS

					PULL_DOWN

				>;

				pinctrl-single,bias-pullup = <

					PULL_DIS

					PULL_UP

					PULL_DIS

					PULL_UP

				>;

				pinctrl-single,drive-strength = <

					DRIVE7_02MA DRIVE6_MASK

				>;

			};

		};



		pmx5: pinmux@fc182000 {

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