Commit dd0d7181 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'spi-fix-v5.8-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi 

Pull spi fixes from Mark Brown:
 "Quite a lot of fixes here for no single reason.

  There's a collection of the usual sort of device specific fixes and
  also a bunch of people have been working on spidev and the userspace
  test program spidev_test so they've got an unusually large collection
  of small fixes"

* tag 'spi-fix-v5.8-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: spidev: fix a potential use-after-free in spidev_release()
  spi: spidev: fix a race between spidev_release and spidev_remove
  spi: stm32-qspi: Fix error path in case of -EPROBE_DEFER
  spi: uapi: spidev: Use TABs for alignment
  spi: spi-fsl-dspi: Free DMA memory with matching function
  spi: tools: Add macro definitions to fix build errors
  spi: tools: Make default_tx/rx and input_tx static
  spi: dt-bindings: amlogic, meson-gx-spicc: Fix schema for meson-g12a
  spi: rspi: Use requested instead of maximum bit rate
  spi: spidev_test: Use %u to format unsigned numbers
  spi: sprd: switch the sequence of setting WDG_LOAD_LOW and _HIGH
parents 75164578 06096cc6

Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml

+17 −9
Original line number Diff line number Diff line
@@ -34,12 +34,15 @@ properties: 
    maxItems: 1



  clocks:

    maxItems: 1

    minItems: 1

    maxItems: 2

    items:

      - description: controller register bus clock

      - description: baud rate generator and delay control clock



  clock-names:

    description: input clock for the baud rate generator

    items:

      - const: core

    minItems: 1

    maxItems: 2



if:

  properties:
@@ -51,17 +54,22 @@ if: 
then:

  properties:

    clocks:

      contains:

        items:

          - description: controller register bus clock

          - description: baud rate generator and delay control clock

      minItems: 2



    clock-names:

      minItems: 2

      items:

        - const: core

        - const: pclk



else:

  properties:

    clocks:

      maxItems: 1



    clock-names:

      items:

        - const: core



required:

  - compatible

  - reg

drivers/spi/spi-fsl-dspi.c

+4 −4
Original line number Diff line number Diff line
@@ -588,14 +588,14 @@ static void dspi_release_dma(struct fsl_dspi *dspi) 
		return;



	if (dma->chan_tx) {

		dma_unmap_single(dma->chan_tx->device->dev, dma->tx_dma_phys,

				 dma_bufsize, DMA_TO_DEVICE);

		dma_free_coherent(dma->chan_tx->device->dev, dma_bufsize,

				  dma->tx_dma_buf, dma->tx_dma_phys);

		dma_release_channel(dma->chan_tx);

	}



	if (dma->chan_rx) {

		dma_unmap_single(dma->chan_rx->device->dev, dma->rx_dma_phys,

				 dma_bufsize, DMA_FROM_DEVICE);

		dma_free_coherent(dma->chan_rx->device->dev, dma_bufsize,

				  dma->rx_dma_buf, dma->rx_dma_phys);

		dma_release_channel(dma->chan_rx);

	}

}

drivers/spi/spi-rspi.c

+21 −7
Original line number Diff line number Diff line
@@ -179,7 +179,7 @@ 


struct rspi_data {

	void __iomem *addr;

	u32 max_speed_hz;

	u32 speed_hz;

	struct spi_controller *ctlr;

	struct platform_device *pdev;

	wait_queue_head_t wait;
@@ -258,8 +258,7 @@ static int rspi_set_config_register(struct rspi_data *rspi, int access_size) 
	rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);



	/* Sets transfer bit rate */

	spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk),

			    2 * rspi->max_speed_hz) - 1;

	spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), 2 * rspi->speed_hz) - 1;

	rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);



	/* Disable dummy transmission, set 16-bit word access, 1 frame */
@@ -299,14 +298,14 @@ static int rspi_rz_set_config_register(struct rspi_data *rspi, int access_size) 


	clksrc = clk_get_rate(rspi->clk);

	while (div < 3) {

		if (rspi->max_speed_hz >= clksrc/4) /* 4=(CLK/2)/2 */

		if (rspi->speed_hz >= clksrc/4) /* 4=(CLK/2)/2 */

			break;

		div++;

		clksrc /= 2;

	}



	/* Sets transfer bit rate */

	spbr = DIV_ROUND_UP(clksrc, 2 * rspi->max_speed_hz) - 1;

	spbr = DIV_ROUND_UP(clksrc, 2 * rspi->speed_hz) - 1;

	rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);

	rspi->spcmd |= div << 2;
@@ -341,7 +340,7 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size) 
	rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);



	/* Sets transfer bit rate */

	spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), 2 * rspi->max_speed_hz);

	spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), 2 * rspi->speed_hz);

	rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);



	/* Disable dummy transmission, set byte access */
@@ -949,9 +948,24 @@ static int rspi_prepare_message(struct spi_controller *ctlr, 
{

	struct rspi_data *rspi = spi_controller_get_devdata(ctlr);

	struct spi_device *spi = msg->spi;

	const struct spi_transfer *xfer;

	int ret;



	rspi->max_speed_hz = spi->max_speed_hz;

	/*

	 * As the Bit Rate Register must not be changed while the device is

	 * active, all transfers in a message must use the same bit rate.

	 * In theory, the sequencer could be enabled, and each Command Register

	 * could divide the base bit rate by a different value.

	 * However, most RSPI variants do not have Transfer Data Length

	 * Multiplier Setting Registers, so each sequence step would be limited

	 * to a single word, making this feature unsuitable for large

	 * transfers, which would gain most from it.

	 */

	rspi->speed_hz = spi->max_speed_hz;

	list_for_each_entry(xfer, &msg->transfers, transfer_list) {

		if (xfer->speed_hz < rspi->speed_hz)

			rspi->speed_hz = xfer->speed_hz;

	}



	rspi->spcmd = SPCMD_SSLKP;

	if (spi->mode & SPI_CPOL)

drivers/spi/spi-sprd-adi.c

+1 −1
Original line number Diff line number Diff line
@@ -389,9 +389,9 @@ static int sprd_adi_restart_handler(struct notifier_block *this, 
	sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_CTRL, val);



	/* Load the watchdog timeout value, 50ms is always enough. */

	sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_HIGH, 0);

	sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_LOW,

		       WDG_LOAD_VAL & WDG_LOAD_MASK);

	sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_HIGH, 0);



	/* Start the watchdog to reset system */

	sprd_adi_read(sadi, sadi->slave_pbase + REG_WDG_CTRL, &val);

drivers/spi/spi-stm32-qspi.c

+26 −20
Original line number Diff line number Diff line
@@ -553,20 +553,6 @@ static const struct spi_controller_mem_ops stm32_qspi_mem_ops = { 
	.exec_op = stm32_qspi_exec_op,

};



static void stm32_qspi_release(struct stm32_qspi *qspi)

{

	pm_runtime_get_sync(qspi->dev);

	/* disable qspi */

	writel_relaxed(0, qspi->io_base + QSPI_CR);

	stm32_qspi_dma_free(qspi);

	mutex_destroy(&qspi->lock);

	pm_runtime_put_noidle(qspi->dev);

	pm_runtime_disable(qspi->dev);

	pm_runtime_set_suspended(qspi->dev);

	pm_runtime_dont_use_autosuspend(qspi->dev);

	clk_disable_unprepare(qspi->clk);

}



static int stm32_qspi_probe(struct platform_device *pdev)

{

	struct device *dev = &pdev->dev;
@@ -642,7 +628,7 @@ static int stm32_qspi_probe(struct platform_device *pdev) 
	if (IS_ERR(rstc)) {

		ret = PTR_ERR(rstc);

		if (ret == -EPROBE_DEFER)

			goto err_qspi_release;

			goto err_clk_disable;

	} else {

		reset_control_assert(rstc);

		udelay(2);
@@ -653,7 +639,7 @@ static int stm32_qspi_probe(struct platform_device *pdev) 
	platform_set_drvdata(pdev, qspi);

	ret = stm32_qspi_dma_setup(qspi);

	if (ret)

		goto err_qspi_release;

		goto err_dma_free;



	mutex_init(&qspi->lock);
@@ -673,15 +659,26 @@ static int stm32_qspi_probe(struct platform_device *pdev) 


	ret = devm_spi_register_master(dev, ctrl);

	if (ret)

		goto err_qspi_release;

		goto err_pm_runtime_free;



	pm_runtime_mark_last_busy(dev);

	pm_runtime_put_autosuspend(dev);



	return 0;



err_qspi_release:

	stm32_qspi_release(qspi);

err_pm_runtime_free:

	pm_runtime_get_sync(qspi->dev);

	/* disable qspi */

	writel_relaxed(0, qspi->io_base + QSPI_CR);

	mutex_destroy(&qspi->lock);

	pm_runtime_put_noidle(qspi->dev);

	pm_runtime_disable(qspi->dev);

	pm_runtime_set_suspended(qspi->dev);

	pm_runtime_dont_use_autosuspend(qspi->dev);

err_dma_free:

	stm32_qspi_dma_free(qspi);

err_clk_disable:

	clk_disable_unprepare(qspi->clk);

err_master_put:

	spi_master_put(qspi->ctrl);
@@ -692,7 +689,16 @@ static int stm32_qspi_remove(struct platform_device *pdev) 
{

	struct stm32_qspi *qspi = platform_get_drvdata(pdev);



	stm32_qspi_release(qspi);

	pm_runtime_get_sync(qspi->dev);

	/* disable qspi */

	writel_relaxed(0, qspi->io_base + QSPI_CR);

	stm32_qspi_dma_free(qspi);

	mutex_destroy(&qspi->lock);

	pm_runtime_put_noidle(qspi->dev);

	pm_runtime_disable(qspi->dev);

	pm_runtime_set_suspended(qspi->dev);

	pm_runtime_dont_use_autosuspend(qspi->dev);

	clk_disable_unprepare(qspi->clk);



	return 0;

}

CRA Git | Maintained and supported by SUSTech CRA and CCSE