Commit dce86ac7 authored by Kan Liang's avatar Kan Liang Committed by Ingo Molnar
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perf/x86: Clean up PEBS_XMM_REGS



Use generic macro PERF_REG_EXTENDED_MASK to replace PEBS_XMM_REGS to
avoid duplication.

Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: https://lkml.kernel.org/r/1559081314-9714-3-git-send-email-kan.liang@linux.intel.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 90d42491
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+2 −2
Original line number Diff line number Diff line
@@ -561,13 +561,13 @@ int x86_pmu_hw_config(struct perf_event *event)
	}

	/* sample_regs_user never support XMM registers */
	if (unlikely(event->attr.sample_regs_user & PEBS_XMM_REGS))
	if (unlikely(event->attr.sample_regs_user & PERF_REG_EXTENDED_MASK))
		return -EINVAL;
	/*
	 * Besides the general purpose registers, XMM registers may
	 * be collected in PEBS on some platforms, e.g. Icelake
	 */
	if (unlikely(event->attr.sample_regs_intr & PEBS_XMM_REGS)) {
	if (unlikely(event->attr.sample_regs_intr & PERF_REG_EXTENDED_MASK)) {
		if (x86_pmu.pebs_no_xmm_regs)
			return -EINVAL;

+1 −1
Original line number Diff line number Diff line
@@ -987,7 +987,7 @@ static u64 pebs_update_adaptive_cfg(struct perf_event *event)
		pebs_data_cfg |= PEBS_DATACFG_GP;

	if ((sample_type & PERF_SAMPLE_REGS_INTR) &&
	    (attr->sample_regs_intr & PEBS_XMM_REGS))
	    (attr->sample_regs_intr & PERF_REG_EXTENDED_MASK))
		pebs_data_cfg |= PEBS_DATACFG_XMMS;

	if (sample_type & PERF_SAMPLE_BRANCH_STACK) {
+0 −18
Original line number Diff line number Diff line
@@ -121,24 +121,6 @@ struct amd_nb {
	 (1ULL << PERF_REG_X86_R14)   | \
	 (1ULL << PERF_REG_X86_R15))

#define PEBS_XMM_REGS                   \
	((1ULL << PERF_REG_X86_XMM0)  | \
	 (1ULL << PERF_REG_X86_XMM1)  | \
	 (1ULL << PERF_REG_X86_XMM2)  | \
	 (1ULL << PERF_REG_X86_XMM3)  | \
	 (1ULL << PERF_REG_X86_XMM4)  | \
	 (1ULL << PERF_REG_X86_XMM5)  | \
	 (1ULL << PERF_REG_X86_XMM6)  | \
	 (1ULL << PERF_REG_X86_XMM7)  | \
	 (1ULL << PERF_REG_X86_XMM8)  | \
	 (1ULL << PERF_REG_X86_XMM9)  | \
	 (1ULL << PERF_REG_X86_XMM10) | \
	 (1ULL << PERF_REG_X86_XMM11) | \
	 (1ULL << PERF_REG_X86_XMM12) | \
	 (1ULL << PERF_REG_X86_XMM13) | \
	 (1ULL << PERF_REG_X86_XMM14) | \
	 (1ULL << PERF_REG_X86_XMM15))

/*
 * Per register state.
 */