Commit dca29491 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: remove static GDS, GWS and OA allocation 



As far as we know this was never used by userspace and so should be removed.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarMarek Olšák <marek.olsak@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4c6097ef

drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c

+3 −3
Original line number Diff line number Diff line
@@ -81,9 +81,9 @@ int amdgpu_bo_list_create(struct amdgpu_device *adev, struct drm_file *filp, 
		return -ENOMEM;



	kref_init(&list->refcount);

	list->gds_obj = adev->gds.gds_gfx_bo;

	list->gws_obj = adev->gds.gws_gfx_bo;

	list->oa_obj = adev->gds.oa_gfx_bo;

	list->gds_obj = NULL;

	list->gws_obj = NULL;

	list->oa_obj = NULL;



	array = amdgpu_bo_list_array_entry(list, 0);

	memset(array, 0, num_entries * sizeof(struct amdgpu_bo_list_entry));

drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h

+3 −18
Original line number Diff line number Diff line
@@ -27,26 +27,11 @@ 
struct amdgpu_ring;

struct amdgpu_bo;



struct amdgpu_gds_asic_info {

	uint32_t	total_size;

	uint32_t	gfx_partition_size;

	uint32_t	cs_partition_size;

};



struct amdgpu_gds {

	struct amdgpu_gds_asic_info	mem;

	struct amdgpu_gds_asic_info	gws;

	struct amdgpu_gds_asic_info	oa;

	uint32_t gds_size;

	uint32_t gws_size;

	uint32_t oa_size;

	uint32_t			gds_compute_max_wave_id;



	/* At present, GDS, GWS and OA resources for gfx (graphics)

	 * is always pre-allocated and available for graphics operation.

	 * Such resource is shared between all gfx clients.

	 * TODO: move this operation to user space

	 * */

	struct amdgpu_bo*		gds_gfx_bo;

	struct amdgpu_bo*		gws_gfx_bo;

	struct amdgpu_bo*		oa_gfx_bo;

};



struct amdgpu_gds_reg_offset {

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

+4 −7
Original line number Diff line number Diff line
@@ -590,13 +590,10 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file 
		struct drm_amdgpu_info_gds gds_info;



		memset(&gds_info, 0, sizeof(gds_info));

		gds_info.gds_gfx_partition_size = adev->gds.mem.gfx_partition_size;

		gds_info.compute_partition_size = adev->gds.mem.cs_partition_size;

		gds_info.gds_total_size = adev->gds.mem.total_size;

		gds_info.gws_per_gfx_partition = adev->gds.gws.gfx_partition_size;

		gds_info.gws_per_compute_partition = adev->gds.gws.cs_partition_size;

		gds_info.oa_per_gfx_partition = adev->gds.oa.gfx_partition_size;

		gds_info.oa_per_compute_partition = adev->gds.oa.cs_partition_size;

		gds_info.compute_partition_size = adev->gds.gds_size;

		gds_info.gds_total_size = adev->gds.gds_size;

		gds_info.gws_per_compute_partition = adev->gds.gws_size;

		gds_info.oa_per_compute_partition = adev->gds.oa_size;

		return copy_to_user(out, &gds_info,

				    min((size_t)size, sizeof(gds_info))) ? -EFAULT : 0;

	}

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

+3 −21
Original line number Diff line number Diff line
@@ -1753,44 +1753,26 @@ int amdgpu_ttm_init(struct amdgpu_device *adev) 


	/* Initialize various on-chip memory pools */

	r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GDS,

			   adev->gds.mem.total_size);

			   adev->gds.gds_size);

	if (r) {

		DRM_ERROR("Failed initializing GDS heap.\n");

		return r;

	}



	r = amdgpu_bo_create_kernel(adev, adev->gds.mem.gfx_partition_size,

				    4, AMDGPU_GEM_DOMAIN_GDS,

				    &adev->gds.gds_gfx_bo, NULL, NULL);

	if (r)

		return r;



	r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GWS,

			   adev->gds.gws.total_size);

			   adev->gds.gws_size);

	if (r) {

		DRM_ERROR("Failed initializing gws heap.\n");

		return r;

	}



	r = amdgpu_bo_create_kernel(adev, adev->gds.gws.gfx_partition_size,

				    1, AMDGPU_GEM_DOMAIN_GWS,

				    &adev->gds.gws_gfx_bo, NULL, NULL);

	if (r)

		return r;



	r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_OA,

			   adev->gds.oa.total_size);

			   adev->gds.oa_size);

	if (r) {

		DRM_ERROR("Failed initializing oa heap.\n");

		return r;

	}



	r = amdgpu_bo_create_kernel(adev, adev->gds.oa.gfx_partition_size,

				    1, AMDGPU_GEM_DOMAIN_OA,

				    &adev->gds.oa_gfx_bo, NULL, NULL);

	if (r)

		return r;



	/* Register debugfs entries for amdgpu_ttm */

	r = amdgpu_ttm_debugfs_init(adev);

	if (r) {

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

+4 −28
Original line number Diff line number Diff line
@@ -4493,12 +4493,8 @@ static int gfx_v7_0_sw_init(void *handle) 


static int gfx_v7_0_sw_fini(void *handle)

{

	int i;

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	amdgpu_bo_free_kernel(&adev->gds.oa_gfx_bo, NULL, NULL);

	amdgpu_bo_free_kernel(&adev->gds.gws_gfx_bo, NULL, NULL);

	amdgpu_bo_free_kernel(&adev->gds.gds_gfx_bo, NULL, NULL);

	int i;



	for (i = 0; i < adev->gfx.num_gfx_rings; i++)

		amdgpu_ring_fini(&adev->gfx.gfx_ring[i]);
@@ -5070,30 +5066,10 @@ static void gfx_v7_0_set_irq_funcs(struct amdgpu_device *adev) 
static void gfx_v7_0_set_gds_init(struct amdgpu_device *adev)

{

	/* init asci gds info */

	adev->gds.mem.total_size = RREG32(mmGDS_VMID0_SIZE);

	adev->gds.gws.total_size = 64;

	adev->gds.oa.total_size = 16;

	adev->gds.gds_size = RREG32(mmGDS_VMID0_SIZE);

	adev->gds.gws_size = 64;

	adev->gds.oa_size = 16;

	adev->gds.gds_compute_max_wave_id = RREG32(mmGDS_COMPUTE_MAX_WAVE_ID);



	if (adev->gds.mem.total_size == 64 * 1024) {

		adev->gds.mem.gfx_partition_size = 4096;

		adev->gds.mem.cs_partition_size = 4096;



		adev->gds.gws.gfx_partition_size = 4;

		adev->gds.gws.cs_partition_size = 4;



		adev->gds.oa.gfx_partition_size = 4;

		adev->gds.oa.cs_partition_size = 1;

	} else {

		adev->gds.mem.gfx_partition_size = 1024;

		adev->gds.mem.cs_partition_size = 1024;



		adev->gds.gws.gfx_partition_size = 16;

		adev->gds.gws.cs_partition_size = 16;



		adev->gds.oa.gfx_partition_size = 4;

		adev->gds.oa.cs_partition_size = 4;

	}

}

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