docs: mm: numaperf.rst Add brief description for access class 1. (dc9e7860) · Commits · 戴 / test

Try to make minimal changes to the document which already describes access class 0 in a generic fashion (including IO initiatiors that are not CPUs). Signed-off-by:

Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by:

Rafael J. Wysocki <rafael.j.wysocki@intel.com>

Documentation/admin-guide/mm/numaperf.rst

+8 −0

Original line number	Diff line number	Diff line
		@@ -56,6 +56,11 @@ nodes' access characteristics share the same performance relative to other
		linked initiator nodes. Each target within an initiator's access class,
		though, do not necessarily perform the same as each other.

		The access class "1" is used to allow differentiation between initiators
		that are CPUs and hence suitable for generic task scheduling, and
		IO initiators such as GPUs and NICs. Unlike access class 0, only
		nodes containing CPUs are considered.

		================
		NUMA Performance
		================
		@@ -88,6 +93,9 @@ The latency attributes are provided in nanoseconds.
		The values reported here correspond to the rated latency and bandwidth
		for the platform.

		Access class 1 takes the same form but only includes values for CPU to
		memory activity.

		==========
		NUMA Cache
		==========

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