Commit dc58958d authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Assert the local engine->wakeref is active 



Due to the asynchronous tasklet and recursive GT wakeref, it may happen
that we submit to the engine (underneath it's own wakeref) prior to the
central wakeref being marked as taken. Switch to checking the local wakeref
for greater consistency.

Fixes: 79ffac85 ("drm/i915: Invert the GEM wakeref hierarchy")
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190503115225.30831-3-chris@chris-wilson.co.uk
parent 7ee280a7

drivers/gpu/drm/i915/gt/intel_engine_cs.c

+3 −0
Original line number Diff line number Diff line
@@ -1090,6 +1090,9 @@ bool intel_engine_is_idle(struct intel_engine_cs *engine) 
	if (i915_reset_failed(engine->i915))

		return true;



	if (!intel_wakeref_active(&engine->wakeref))

		return true;



	/* Waiting to drain ELSP? */

	if (READ_ONCE(engine->execlists.active)) {

		struct tasklet_struct *t = &engine->execlists.tasklet;

drivers/gpu/drm/i915/gt/intel_lrc.c

+2 −2
Original line number Diff line number Diff line
@@ -535,7 +535,7 @@ static void execlists_submit_ports(struct intel_engine_cs *engine) 
	 * that all ELSP are drained i.e. we have processed the CSB,

	 * before allowing ourselves to idle and calling intel_runtime_pm_put().

	 */

	GEM_BUG_ON(!engine->i915->gt.awake);

	GEM_BUG_ON(!intel_wakeref_active(&engine->wakeref));



	/*

	 * ELSQ note: the submit queue is not cleared after being submitted
@@ -1085,7 +1085,7 @@ static void execlists_submission_tasklet(unsigned long data) 


	GEM_TRACE("%s awake?=%d, active=%x\n",

		  engine->name,

		  !!engine->i915->gt.awake,

		  !!intel_wakeref_active(&engine->wakeref),

		  engine->execlists.active);



	spin_lock_irqsave(&engine->timeline.lock, flags);

CRA Git | Maintained and supported by SUSTech CRA and CCSE