Commit dc413a90 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms and a couple of the small driver
  subsystems we merge through our tree:

  Among the larger pieces:

   - Power management improvements for TI am335x and am437x (RTC
     suspend/wake)

   - Misc new additions for Amlogic (socinfo updates)

   - ZynqMP FPGA manager

   - Nvidia improvements for reset/powergate handling

   - PMIC wrapper for Mediatek MT8516

   - Misc fixes/improvements for ARM SCMI, TEE, NXP i.MX SCU drivers"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (57 commits)
  soc: aspeed: fix Kconfig
  soc: add aspeed folder and misc drivers
  spi: zynqmp: Fix build break
  soc: imx: Add generic i.MX8 SoC driver
  MAINTAINERS: Update email for Qualcomm SoC maintainer
  memory: tegra: Fix a typos for "fdcdwr2" mc client
  Revert "ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+"
  memory: tegra: Replace readl-writel with mc_readl-mc_writel
  memory: tegra: Fix integer overflow on tick value calculation
  memory: tegra: Fix missed registers values latching
  ARM: tegra: cpuidle: Handle tick broadcasting within cpuidle core on Tegra20/30
  optee: allow to work without static shared memory
  soc/tegra: pmc: Move powergate initialisation to probe
  soc/tegra: pmc: Remove reset sysfs entries on error
  soc/tegra: pmc: Fix reset sources and levels
  soc: amlogic: meson-gx-pwrc-vpu: Add support for G12A
  soc: amlogic: meson-gx-pwrc-vpu: Fix power on/off register bitmask
  fpga manager: Adding FPGA Manager support for Xilinx zynqmp
  dt-bindings: fpga: Add bindings for ZynqMP fpga driver
  firmware: xilinx: Add fpga API's
  ...
parents e8a1d701 80d0c649

Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt

0 → 100644
+25 −0
Original line number Diff line number Diff line 
Devicetree bindings for Zynq Ultrascale MPSoC FPGA Manager.

The ZynqMP SoC uses the PCAP (Processor configuration Port) to configure the

Programmable Logic (PL). The configuration uses  the firmware interface.



Required properties:

- compatible: should contain "xlnx,zynqmp-pcap-fpga"



Example for full FPGA configuration:



	fpga-region0 {

		compatible = "fpga-region";

		fpga-mgr = <&zynqmp_pcap>;

		#address-cells = <0x1>;

		#size-cells = <0x1>;

	};



	firmware {

		zynqmp_firmware: zynqmp-firmware {

			compatible = "xlnx,zynqmp-firmware";

			method = "smc";

			zynqmp_pcap: pcap {

				compatible = "xlnx,zynqmp-pcap-fpga";

			};

		};

	};

Documentation/devicetree/bindings/soc/mediatek/pwrap.txt

+1 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ Required properties in pwrap device node. 
	"mediatek,mt8135-pwrap" for MT8135 SoCs

	"mediatek,mt8173-pwrap" for MT8173 SoCs

	"mediatek,mt8183-pwrap" for MT8183 SoCs

	"mediatek,mt8516-pwrap" for MT8516 SoCs

- interrupts: IRQ for pwrap in SOC

- reg-names: Must include the following entries:

  "pwrap": Main registers base

Documentation/xilinx/eemi.txt

+2 −2
Original line number Diff line number Diff line
@@ -41,8 +41,8 @@ Example of EEMI ops usage: 
	int ret;



	eemi_ops = zynqmp_pm_get_eemi_ops();

	if (!eemi_ops)

		return -ENXIO;

	if (IS_ERR(eemi_ops))

		return PTR_ERR(eemi_ops);



	ret = eemi_ops->query_data(qdata, ret_payload);

MAINTAINERS

+1 −1
Original line number Diff line number Diff line
@@ -2043,7 +2043,7 @@ W: http://www.armlinux.org.uk/ 
S:	Maintained



ARM/QUALCOMM SUPPORT

M:	Andy Gross <andy.gross@linaro.org>

M:	Andy Gross <agross@kernel.org>

M:	David Brown <david.brown@linaro.org>

L:	linux-arm-msm@vger.kernel.org

S:	Maintained

arch/arm/mach-omap2/pm33xx-core.c

+75 −1
Original line number Diff line number Diff line
@@ -10,6 +10,12 @@ 
#include <asm/suspend.h>

#include <linux/errno.h>

#include <linux/platform_data/pm33xx.h>

#include <linux/clk.h>

#include <linux/platform_data/gpio-omap.h>

#include <linux/pinctrl/pinmux.h>

#include <linux/wkup_m3_ipc.h>

#include <linux/of.h>

#include <linux/rtc.h>



#include "cm33xx.h"

#include "common.h"
@@ -38,6 +44,29 @@ static int am43xx_map_scu(void) 
	return 0;

}



static int am33xx_check_off_mode_enable(void)

{

	if (enable_off_mode)

		pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n");



	/* off mode not supported on am335x so return 0 always */

	return 0;

}



static int am43xx_check_off_mode_enable(void)

{

	/*

	 * Check for am437x-gp-evm which has the right Hardware design to

	 * support this mode reliably.

	 */

	if (of_machine_is_compatible("ti,am437x-gp-evm") && enable_off_mode)

		return enable_off_mode;

	else if (enable_off_mode)

		pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n");



	return 0;

}



static int amx3_common_init(void)

{

	gfx_pwrdm = pwrdm_lookup("gfx_pwrdm");
@@ -141,6 +170,8 @@ static int am43xx_suspend(unsigned int state, int (*fn)(unsigned long), 
	scu_power_mode(scu_base, SCU_PM_POWEROFF);

	ret = cpu_suspend(args, fn);

	scu_power_mode(scu_base, SCU_PM_NORMAL);



	if (!am43xx_check_off_mode_enable())

		amx3_post_suspend_common();



	return ret;
@@ -163,10 +194,48 @@ void __iomem *am43xx_get_rtc_base_addr(void) 
	return omap_hwmod_get_mpu_rt_va(rtc_oh);

}



static void am43xx_save_context(void)

{

}



static void am33xx_save_context(void)

{

	omap_intc_save_context();

}



static void am33xx_restore_context(void)

{

	omap_intc_restore_context();

}



static void am43xx_restore_context(void)

{

	/*

	 * HACK: restore dpll_per_clkdcoldo register contents, to avoid

	 * breaking suspend-resume

	 */

	writel_relaxed(0x0, AM33XX_L4_WK_IO_ADDRESS(0x44df2e14));

}



static void am43xx_prepare_rtc_suspend(void)

{

	omap_hwmod_enable(rtc_oh);

}



static void am43xx_prepare_rtc_resume(void)

{

	omap_hwmod_idle(rtc_oh);

}



static struct am33xx_pm_platform_data am33xx_ops = {

	.init = am33xx_suspend_init,

	.soc_suspend = am33xx_suspend,

	.get_sram_addrs = amx3_get_sram_addrs,

	.save_context = am33xx_save_context,

	.restore_context = am33xx_restore_context,

	.prepare_rtc_suspend = am43xx_prepare_rtc_suspend,

	.prepare_rtc_resume = am43xx_prepare_rtc_resume,

	.check_off_mode_enable = am33xx_check_off_mode_enable,

	.get_rtc_base_addr = am43xx_get_rtc_base_addr,

};
@@ -174,6 +243,11 @@ static struct am33xx_pm_platform_data am43xx_ops = { 
	.init = am43xx_suspend_init,

	.soc_suspend = am43xx_suspend,

	.get_sram_addrs = amx3_get_sram_addrs,

	.save_context = am43xx_save_context,

	.restore_context = am43xx_restore_context,

	.prepare_rtc_suspend = am43xx_prepare_rtc_suspend,

	.prepare_rtc_resume = am43xx_prepare_rtc_resume,

	.check_off_mode_enable = am43xx_check_off_mode_enable,

	.get_rtc_base_addr = am43xx_get_rtc_base_addr,

};

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