Commit dc1cedca authored by Ravi Bangoria's avatar Ravi Bangoria Committed by Michael Ellerman
Browse files

powerpc/dt_cpu_ftrs: Add feature for 2nd DAWR 



Add new device-tree feature for 2nd DAWR. If this feature is present,
2nd DAWR is supported, otherwise not.

Signed-off-by: default avatarRavi Bangoria <ravi.bangoria@linux.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200723090813.303838-6-ravi.bangoria@linux.ibm.com
parent 8f460a81

arch/powerpc/include/asm/cputable.h

+2 −1
Original line number Diff line number Diff line
@@ -214,6 +214,7 @@ static inline void cpu_feature_keys_init(void) { } 
#define CPU_FTR_P9_TLBIE_ERAT_BUG	LONG_ASM_CONST(0x0001000000000000)

#define CPU_FTR_P9_RADIX_PREFETCH_BUG	LONG_ASM_CONST(0x0002000000000000)

#define CPU_FTR_ARCH_31			LONG_ASM_CONST(0x0004000000000000)

#define CPU_FTR_DAWR1			LONG_ASM_CONST(0x0008000000000000)



#ifndef __ASSEMBLY__
@@ -478,7 +479,7 @@ static inline void cpu_feature_keys_init(void) { } 
	    CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \

	    CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \

	    CPU_FTR_TM_COMP | CPU_FTR_ARCH_300 | CPU_FTR_ARCH_31 | \

	    CPU_FTR_DAWR)

	    CPU_FTR_DAWR | CPU_FTR_DAWR1)

#define CPU_FTRS_CELL	(CPU_FTR_LWSYNC | \

	    CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \

	    CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \

arch/powerpc/kernel/dt_cpu_ftrs.c

+1 −0
Original line number Diff line number Diff line
@@ -686,6 +686,7 @@ static struct dt_cpu_feature_match __initdata 
	{"wait-v3", feat_enable, 0},

	{"prefix-instructions", feat_enable, 0},

	{"matrix-multiply-assist", feat_enable_mma, 0},

	{"debug-facilities-v31", feat_enable, CPU_FTR_DAWR1},

};



static bool __initdata using_dt_cpu_ftrs;

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