Commit dc07c91b authored by Andiry Xu's avatar Andiry Xu Committed by Sarah Sharp
Browse files

xHCI: fix wMaxPacketSize mask 



USB2.0 spec 9.6.6 says: For all endpoints, bit 10..0 specify the maximum
packet size(in bytes).

So the wMaxPacketSize mask should be 0x7ff rather than 0x3ff.

This patch should be queued for the stable tree.  The bug in
xhci_endpoint_init() was present as far back as 2.6.31, and the bug in
xhci_get_max_esit_payload() was present when the function was introduced
in 2.6.34.

Reported-by: default avatarSander Eikelenboom <linux@eikelenboom.it>
Signed-off-by: default avatarAndiry Xu <andiry.xu@amd.com>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: stable@kernel.org
parent 74bb844a

drivers/usb/host/xhci-mem.c

+2 −2
Original line number Diff line number Diff line
@@ -1045,7 +1045,7 @@ static inline u32 xhci_get_max_esit_payload(struct xhci_hcd *xhci, 
	if (udev->speed == USB_SPEED_SUPER)

		return ep->ss_ep_comp.wBytesPerInterval;



	max_packet = ep->desc.wMaxPacketSize & 0x3ff;

	max_packet = GET_MAX_PACKET(ep->desc.wMaxPacketSize);

	max_burst = (ep->desc.wMaxPacketSize & 0x1800) >> 11;

	/* A 0 in max burst means 1 transfer per ESIT */

	return max_packet * (max_burst + 1);
@@ -1135,7 +1135,7 @@ int xhci_endpoint_init(struct xhci_hcd *xhci, 
		/* Fall through */

	case USB_SPEED_FULL:

	case USB_SPEED_LOW:

		max_packet = ep->desc.wMaxPacketSize & 0x3ff;

		max_packet = GET_MAX_PACKET(ep->desc.wMaxPacketSize);

		ep_ctx->ep_info2 |= MAX_PACKET(max_packet);

		break;

	default:

drivers/usb/host/xhci.h

+5 −0
Original line number Diff line number Diff line
@@ -621,6 +621,11 @@ struct xhci_ep_ctx { 
#define MAX_PACKET_MASK		(0xffff << 16)

#define MAX_PACKET_DECODED(p)	(((p) >> 16) & 0xffff)



/* Get max packet size from ep desc. Bit 10..0 specify the max packet size.

 * USB2.0 spec 9.6.6.

 */

#define GET_MAX_PACKET(p)	((p) & 0x7ff)



/* tx_info bitmasks */

#define AVG_TRB_LENGTH_FOR_EP(p)	((p) & 0xffff)

#define MAX_ESIT_PAYLOAD_FOR_EP(p)	(((p) & 0xffff) << 16)

CRA Git | Maintained and supported by SUSTech CRA and CCSE