Commit dbfc95f9 authored Aug 19, 2020 by Florian Fainelli Committed by Thomas Bogendoerfer Aug 21, 2020

MIPS: mm: BMIPS5000 has inclusive physical caches



When the BMIPS generic cpu-feature-overrides.h file was introduced,
cpu_has_inclusive_caches/MIPS_CPU_INCLUSIVE_CACHES was not set for
BMIPS5000 CPUs. Correct this when we have initialized the MIPS secondary
cache successfully.

Fixes: f337967d ("MIPS: BMIPS: Add cpu-feature-overrides.h")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

parent 433c1ca0

arch/mips/mm/c-r4k.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -1712,7 +1712,11 @@ static void setup_scache(void)
		printk("MIPS secondary cache %ldkB, %s, linesize %d bytes.\n",
		scache_size >> 10,
		way_string[c->scache.ways], c->scache.linesz);

		if (current_cpu_type() == CPU_BMIPS5000)
		c->options \|= MIPS_CPU_INCLUSIVE_CACHES;
		}

		#else
		if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
		panic("Dunno how to handle MIPS32 / MIPS64 second level cache");

Admin message