Commit dbc049ee authored by Anup Patel's avatar Anup Patel Committed by Jassi Brar
Browse files

mailbox: Add driver for Broadcom FlexRM ring manager 



Some of the Broadcom iProc SoCs have FlexRM ring manager
which provides a ring-based programming interface to various
offload engines (e.g. RAID, Crypto, etc).

This patch adds a common mailbox driver for Broadcom FlexRM
ring manager which can be shared by various offload engine
drivers (implemented as mailbox clients).

Reviewed-by: default avatarRay Jui <ray.jui@broadcom.com>
Reviewed-by: default avatarScott Branden <scott.branden@broadcom.com>
Reviewed-by: default avatarPramod KUMAR <pramod.kumar@broadcom.com>
Signed-off-by: default avatarAnup Patel <anup.patel@broadcom.com>
Signed-off-by: default avatarJassi Brar <jaswinder.singh@linaro.org>
parent 52e2dadd

drivers/mailbox/Kconfig

+11 −0
Original line number Diff line number Diff line
@@ -151,4 +151,15 @@ config BCM_PDC_MBOX 
	  Mailbox implementation for the Broadcom FlexSparx DMA ring manager,

	  which provides access to various offload engines on Broadcom

	  SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.



config BCM_FLEXRM_MBOX

	tristate "Broadcom FlexRM Mailbox"

	depends on ARM64 || COMPILE_TEST

	depends on HAS_DMA

	select GENERIC_MSI_IRQ_DOMAIN

	default ARCH_BCM_IPROC

	help

	  Mailbox implementation of the Broadcom FlexRM ring manager,

	  which provides access to various offload engines on Broadcom

	  SoCs. Say Y here if you want to use the Broadcom FlexRM.

endif

drivers/mailbox/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -30,4 +30,6 @@ obj-$(CONFIG_HI6220_MBOX) += hi6220-mailbox.o 


obj-$(CONFIG_BCM_PDC_MBOX)	+= bcm-pdc-mailbox.o



obj-$(CONFIG_BCM_FLEXRM_MBOX)	+= bcm-flexrm-mailbox.o



obj-$(CONFIG_TEGRA_HSP_MBOX)	+= tegra-hsp.o

drivers/mailbox/bcm-flexrm-mailbox.c

0 → 100644
+1595 −0

File added.

Preview size limit exceeded, changes collapsed.

include/linux/mailbox/brcm-message.h

+10 −4
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 


enum brcm_message_type {

	BRCM_MESSAGE_UNKNOWN = 0,

	BRCM_MESSAGE_BATCH,

	BRCM_MESSAGE_SPU,

	BRCM_MESSAGE_SBA,

	BRCM_MESSAGE_MAX,
@@ -23,23 +24,28 @@ enum brcm_message_type { 


struct brcm_sba_command {

	u64 cmd;

	u64 *cmd_dma;

	dma_addr_t cmd_dma_addr;

#define BRCM_SBA_CMD_TYPE_A		BIT(0)

#define BRCM_SBA_CMD_TYPE_B		BIT(1)

#define BRCM_SBA_CMD_TYPE_C		BIT(2)

#define BRCM_SBA_CMD_HAS_RESP		BIT(3)

#define BRCM_SBA_CMD_HAS_OUTPUT		BIT(4)

	u64 flags;

	dma_addr_t input;

	size_t input_len;

	dma_addr_t resp;

	size_t resp_len;

	dma_addr_t output;

	size_t output_len;

	dma_addr_t data;

	size_t data_len;

};



struct brcm_message {

	enum brcm_message_type type;

	union {

		struct {

			struct brcm_message *msgs;

			unsigned int msgs_queued;

			unsigned int msgs_count;

		} batch;

		struct {

			struct scatterlist *src;

			struct scatterlist *dst;

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