Commit dbb381b6 authored Mar 30, 2020 by Linus Torvalds

Merge tag 'timers-core-2020-03-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timekeeping and timer updates from Thomas Gleixner:
 "Core:

   - Consolidation of the vDSO build infrastructure to address the
     difficulties of cross-builds for ARM64 compat vDSO libraries by
     restricting the exposure of header content to the vDSO build.

     This is achieved by splitting out header content into separate
     headers. which contain only the minimaly required information which
     is necessary to build the vDSO. These new headers are included from
     the kernel headers and the vDSO specific files.

   - Enhancements to the generic vDSO library allowing more fine grained
     control over the compiled in code, further reducing architecture
     specific storage and preparing for adopting the generic library by
     PPC.

   - Cleanup and consolidation of the exit related code in posix CPU
     timers.

   - Small cleanups and enhancements here and there

  Drivers:

   - The obligatory new drivers: Ingenic JZ47xx and X1000 TCU support

   - Correct the clock rate of PIT64b global clock

   - setup_irq() cleanup

   - Preparation for PWM and suspend support for the TI DM timer

   - Expand the fttmr010 driver to support ast2600 systems

   - The usual small fixes, enhancements and cleanups all over the
     place"

* tag 'timers-core-2020-03-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (80 commits)
  Revert "clocksource/drivers/timer-probe: Avoid creating dead devices"
  vdso: Fix clocksource.h macro detection
  um: Fix header inclusion
  arm64: vdso32: Enable Clang Compilation
  lib/vdso: Enable common headers
  arm: vdso: Enable arm to use common headers
  x86/vdso: Enable x86 to use common headers
  mips: vdso: Enable mips to use common headers
  arm64: vdso32: Include common headers in the vdso library
  arm64: vdso: Include common headers in the vdso library
  arm64: Introduce asm/vdso/processor.h
  arm64: vdso32: Code clean up
  linux/elfnote.h: Replace elf.h with UAPI equivalent
  scripts: Fix the inclusion order in modpost
  common: Introduce processor.h
  linux/ktime.h: Extract common header for vDSO
  linux/jiffies.h: Extract common header for vDSO
  linux/time64.h: Extract common header for vDSO
  linux/time32.h: Extract common header for vDSO
  linux/time.h: Extract common header for vDSO
  ...

parents 336622e9 4479730e

Documentation/devicetree/bindings/timer/faraday,fttmr010.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -11,6 +11,7 @@ Required properties:
		"moxa,moxart-timer", "faraday,fttmr010"
		"aspeed,ast2400-timer"
		"aspeed,ast2500-timer"
		"aspeed,ast2600-timer"

		- reg : Should contain registers location and length
		- interrupts : Should contain the three timer interrupts usually with

Documentation/devicetree/bindings/timer/ingenic,tcu.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -10,6 +10,7 @@ Required properties:
		* ingenic,jz4740-tcu
		* ingenic,jz4725b-tcu
		* ingenic,jz4770-tcu
		* ingenic,x1000-tcu
		followed by "simple-mfd".
		- reg: Should be the offset/length value corresponding to the TCU registers
		- clocks: List of phandle & clock specifiers for clocks external to the TCU.

arch/arm/Kconfig

+0 −1

Original line number	Diff line number	Diff line
		@@ -3,7 +3,6 @@ config ARM
		bool
		default y
		select ARCH_32BIT_OFF_T
		select ARCH_CLOCKSOURCE_DATA
		select ARCH_HAS_BINFMT_FLAT
		select ARCH_HAS_DEBUG_VIRTUAL if MMU
		select ARCH_HAS_DEVMEM_IS_ALLOWED

arch/arm/include/asm/clocksource.h

+3 −4

Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0 */
		#ifndef _ASM_CLOCKSOURCE_H
		#define _ASM_CLOCKSOURCE_H

		struct arch_clocksource_data {
		bool vdso_direct; /* Usable for direct VDSO access? */
		};
		#include <asm/vdso/clocksource.h>

		#endif
		#endif /* _ASM_CLOCKSOURCE_H */

arch/arm/include/asm/cp15.h

+1 −19

Original line number	Diff line number	Diff line
		@@ -50,25 +50,7 @@

		#ifdef CONFIG_CPU_CP15

		#define __ACCESS_CP15(CRn, Op1, CRm, Op2) \
		"mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32
		#define __ACCESS_CP15_64(Op1, CRm) \
		"mrrc", "mcrr", __stringify(p15, Op1, %Q0, %R0, CRm), u64

		#define __read_sysreg(r, w, c, t) ({ \
		t __val; \
		asm volatile(r " " c : "=r" (__val)); \
		__val; \
		})
		#define read_sysreg(...) __read_sysreg(__VA_ARGS__)

		#define __write_sysreg(v, r, w, c, t) asm volatile(w " " c : : "r" ((t)(v)))
		#define write_sysreg(v, ...) __write_sysreg(v, __VA_ARGS__)

		#define BPIALL __ACCESS_CP15(c7, 0, c5, 6)
		#define ICIALLU __ACCESS_CP15(c7, 0, c5, 0)

		#define CNTVCT __ACCESS_CP15_64(1, c14)
		#include <asm/vdso/cp15.h>

		extern unsigned long cr_alignment; /* defined in entry-armv.S */

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