Commit db9cd76d authored by Lowry Li (Arm Technology China)'s avatar Lowry Li (Arm Technology China) Committed by james qian wang (Arm Technology China)
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drm/komeda: Adds gamma and color-transform support for DOU-IPS 



Adds gamma and color-transform support for DOU-IPS.
Adds two caps members fgamma_coeffs and ctm_coeffs to komeda_improc_state.
If color management changed, set gamma and color-transform accordingly.

v5: Rebase with drm-misc-next

Signed-off-by: default avatarLowry Li (Arm Technology China) <lowry.li@arm.com>
Signed-off-by: default avatarjames qian wang (Arm Technology China) <james.qian.wang@arm.com>
Reviewed-by: default avatarMihail Atanassov <mihail.atanassov@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191112110927.20931-5-james.qian.wang@arm.com
parent bb346b66

drivers/gpu/drm/arm/display/komeda/d71/d71_component.c

+20 −0
Original line number Diff line number Diff line
@@ -1044,7 +1044,9 @@ static int d71_merger_init(struct d71_dev *d71, 
static void d71_improc_update(struct komeda_component *c,

			      struct komeda_component_state *state)

{

	struct drm_crtc_state *crtc_st = state->crtc->state;

	struct komeda_improc_state *st = to_improc_st(state);

	struct d71_pipeline *pipe = to_d71_pipeline(c->pipeline);

	u32 __iomem *reg = c->reg;

	u32 index, mask = 0, ctrl = 0;
@@ -1055,6 +1057,24 @@ static void d71_improc_update(struct komeda_component *c, 
	malidp_write32(reg, BLK_SIZE, HV_SIZE(st->hsize, st->vsize));

	malidp_write32(reg, IPS_DEPTH, st->color_depth);



	if (crtc_st->color_mgmt_changed) {

		mask |= IPS_CTRL_FT | IPS_CTRL_RGB;



		if (crtc_st->gamma_lut) {

			malidp_write_group(pipe->dou_ft_coeff_addr, FT_COEFF0,

					   KOMEDA_N_GAMMA_COEFFS,

					   st->fgamma_coeffs);

			ctrl |= IPS_CTRL_FT; /* enable gamma */

		}



		if (crtc_st->ctm) {

			malidp_write_group(reg, IPS_RGB_RGB_COEFF0,

					   KOMEDA_N_CTM_COEFFS,

					   st->ctm_coeffs);

			ctrl |= IPS_CTRL_RGB; /* enable gamut */

		}

	}



	mask |= IPS_CTRL_YUV | IPS_CTRL_CHD422 | IPS_CTRL_CHD420;



	/* config color format */

drivers/gpu/drm/arm/display/komeda/komeda_crtc.c

+2 −0
Original line number Diff line number Diff line
@@ -617,6 +617,8 @@ static int komeda_crtc_add(struct komeda_kms_dev *kms, 


	crtc->port = kcrtc->master->of_output_port;



	drm_crtc_enable_color_mgmt(crtc, 0, true, KOMEDA_COLOR_LUT_SIZE);



	return err;

}

drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h

+3 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include <drm/drm_atomic.h>

#include <drm/drm_atomic_helper.h>

#include "malidp_utils.h"

#include "komeda_color_mgmt.h"



#define KOMEDA_MAX_PIPELINES		2

#define KOMEDA_PIPELINE_MAX_LAYERS	4
@@ -327,6 +328,8 @@ struct komeda_improc_state { 
	struct komeda_component_state base;

	u8 color_format, color_depth;

	u16 hsize, vsize;

	u32 fgamma_coeffs[KOMEDA_N_GAMMA_COEFFS];

	u32 ctm_coeffs[KOMEDA_N_CTM_COEFFS];

};



/* display timing controller */

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c

+6 −0
Original line number Diff line number Diff line
@@ -802,6 +802,12 @@ komeda_improc_validate(struct komeda_improc *improc, 
		st->color_format = BIT(__ffs(avail_formats));

	}



	if (kcrtc_st->base.color_mgmt_changed) {

		drm_lut_to_fgamma_coeffs(kcrtc_st->base.gamma_lut,

					 st->fgamma_coeffs);

		drm_ctm_to_coeffs(kcrtc_st->base.ctm, st->ctm_coeffs);

	}



	komeda_component_add_input(&st->base, &dflow->input, 0);

	komeda_component_set_output(&dflow->input, &improc->base, 0);

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