Commit db8165f5 authored by Max Filippov's avatar Max Filippov
Browse files

xtensa: select PERF_USE_VMALLOC for cache-aliasing configurations 



Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
parent 5fdf377d

arch/xtensa/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ config XTENSA 
	select HAVE_PERF_EVENTS

	select IRQ_DOMAIN

	select MODULES_USE_ELF_RELA

	select PERF_USE_VMALLOC

	select VIRT_TO_BUS

	help

	  Xtensa processors are 32-bit RISC machines designed by Tensilica

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