Commit db73c5a8 authored by Dave Hansen's avatar Dave Hansen Committed by Ingo Molnar
Browse files

x86/intel_idle: Use Intel family macros for intel_idle 



Use the new INTEL_FAM6_* macros for intel_idle.c.  Also fix up
some of the macros to be consistent with how some of the
intel_idle code refers to the model.

There's on oddity here: model 0x1F is uniquely referred to here
and nowhere else that I could find.  0x1E/0x1F are just spelled
out as "Intel Core i7 and i5 Processors" in the SDM or as "Intel
processors based on the Nehalem, Westmere microarchitectures" in
the RDPMC section.  Comments between tables 19-19 and 19-20 in
the SDM seem to point to 0x1F being some kind of Westmere, so
let's call it "WESTMERE2".

Signed-off-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
Acked-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Len Brown <lenb@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: jacob.jun.pan@intel.com
Cc: linux-pm@vger.kernel.org
Link: http://lkml.kernel.org/r/20160603001932.EE978EB9@viggo.jf.intel.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent d40671e3

drivers/idle/intel_idle.c

+36 −35
Original line number Diff line number Diff line
@@ -62,6 +62,7 @@ 
#include <linux/cpu.h>

#include <linux/module.h>

#include <asm/cpu_device_id.h>

#include <asm/intel-family.h>

#include <asm/mwait.h>

#include <asm/msr.h>
@@ -1020,38 +1021,38 @@ static const struct idle_cpu idle_cpu_bxt = { 
	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu }



static const struct x86_cpu_id intel_idle_ids[] __initconst = {

	ICPU(0x1a, idle_cpu_nehalem),

	ICPU(0x1e, idle_cpu_nehalem),

	ICPU(0x1f, idle_cpu_nehalem),

	ICPU(0x25, idle_cpu_nehalem),

	ICPU(0x2c, idle_cpu_nehalem),

	ICPU(0x2e, idle_cpu_nehalem),

	ICPU(0x1c, idle_cpu_atom),

	ICPU(0x26, idle_cpu_lincroft),

	ICPU(0x2f, idle_cpu_nehalem),

	ICPU(0x2a, idle_cpu_snb),

	ICPU(0x2d, idle_cpu_snb),

	ICPU(0x36, idle_cpu_atom),

	ICPU(0x37, idle_cpu_byt),

	ICPU(0x4c, idle_cpu_cht),

	ICPU(0x3a, idle_cpu_ivb),

	ICPU(0x3e, idle_cpu_ivt),

	ICPU(0x3c, idle_cpu_hsw),

	ICPU(0x3f, idle_cpu_hsw),

	ICPU(0x45, idle_cpu_hsw),

	ICPU(0x46, idle_cpu_hsw),

	ICPU(0x4d, idle_cpu_avn),

	ICPU(0x3d, idle_cpu_bdw),

	ICPU(0x47, idle_cpu_bdw),

	ICPU(0x4f, idle_cpu_bdw),

	ICPU(0x56, idle_cpu_bdw),

	ICPU(0x4e, idle_cpu_skl),

	ICPU(0x5e, idle_cpu_skl),

	ICPU(0x8e, idle_cpu_skl),

	ICPU(0x9e, idle_cpu_skl),

	ICPU(0x55, idle_cpu_skx),

	ICPU(0x57, idle_cpu_knl),

	ICPU(0x5c, idle_cpu_bxt),

	ICPU(INTEL_FAM6_NEHALEM_EP,		idle_cpu_nehalem),

	ICPU(INTEL_FAM6_NEHALEM,		idle_cpu_nehalem),

	ICPU(INTEL_FAM6_WESTMERE2,		idle_cpu_nehalem),

	ICPU(INTEL_FAM6_WESTMERE,		idle_cpu_nehalem),

	ICPU(INTEL_FAM6_WESTMERE_EP,		idle_cpu_nehalem),

	ICPU(INTEL_FAM6_NEHALEM_EX,		idle_cpu_nehalem),

	ICPU(INTEL_FAM6_ATOM_PINEVIEW,		idle_cpu_atom),

	ICPU(INTEL_FAM6_ATOM_LINCROFT,		idle_cpu_lincroft),

	ICPU(INTEL_FAM6_WESTMERE_EX,		idle_cpu_nehalem),

	ICPU(INTEL_FAM6_SANDYBRIDGE,		idle_cpu_snb),

	ICPU(INTEL_FAM6_SANDYBRIDGE_X,		idle_cpu_snb),

	ICPU(INTEL_FAM6_ATOM_CEDARVIEW,		idle_cpu_atom),

	ICPU(INTEL_FAM6_ATOM_SILVERMONT1,	idle_cpu_byt),

	ICPU(INTEL_FAM6_ATOM_AIRMONT,		idle_cpu_cht),

	ICPU(INTEL_FAM6_IVYBRIDGE,		idle_cpu_ivb),

	ICPU(INTEL_FAM6_IVYBRIDGE_X,		idle_cpu_ivt),

	ICPU(INTEL_FAM6_HASWELL_CORE,		idle_cpu_hsw),

	ICPU(INTEL_FAM6_HASWELL_X,		idle_cpu_hsw),

	ICPU(INTEL_FAM6_HASWELL_ULT,		idle_cpu_hsw),

	ICPU(INTEL_FAM6_HASWELL_GT3E,		idle_cpu_hsw),

	ICPU(INTEL_FAM6_ATOM_SILVERMONT2,	idle_cpu_avn),

	ICPU(INTEL_FAM6_BROADWELL_CORE,		idle_cpu_bdw),

	ICPU(INTEL_FAM6_BROADWELL_GT3E,		idle_cpu_bdw),

	ICPU(INTEL_FAM6_BROADWELL_X,		idle_cpu_bdw),

	ICPU(INTEL_FAM6_BROADWELL_XEON_D,	idle_cpu_bdw),

	ICPU(INTEL_FAM6_SKYLAKE_MOBILE,		idle_cpu_skl),

	ICPU(INTEL_FAM6_SKYLAKE_DESKTOP,	idle_cpu_skl),

	ICPU(INTEL_FAM6_KABYLAKE_MOBILE,	idle_cpu_skl),

	ICPU(INTEL_FAM6_KABYLAKE_DESKTOP,	idle_cpu_skl),

	ICPU(INTEL_FAM6_SKYLAKE_X,		idle_cpu_skx),

	ICPU(INTEL_FAM6_XEON_PHI_KNL,		idle_cpu_knl),

	ICPU(INTEL_FAM6_ATOM_GOLDMONT,		idle_cpu_bxt),

	{}

};

MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);
@@ -1261,13 +1262,13 @@ static void intel_idle_state_table_update(void) 
{

	switch (boot_cpu_data.x86_model) {



	case 0x3e: /* IVT */

	case INTEL_FAM6_IVYBRIDGE_X:

		ivt_idle_state_table_update();

		break;

	case 0x5c: /* BXT */

	case INTEL_FAM6_ATOM_GOLDMONT:

		bxt_idle_state_table_update();

		break;

	case 0x5e: /* SKL-H */

	case INTEL_FAM6_SKYLAKE_DESKTOP:

		sklh_idle_state_table_update();

		break;

	}

CRA Git | Maintained and supported by SUSTech CRA and CCSE