Merge branch 'clk-next' into v4.3-rc1 (db544f1b) · Commits · 戴 / test

drivers/clk/h8300/clk-h8s2678.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -8,6 +8,7 @@
		#include <linux/err.h>
		#include <linux/device.h>
		#include <linux/of_address.h>
		#include <linux/slab.h>

		static DEFINE_SPINLOCK(clklock);

+7 −1

Original line number	Diff line number	Diff line
		config COMMON_CLK_HI6220
		bool "Hi6220 Clock Driver"
		depends on (ARCH_HISI \|\| COMPILE_TEST) && MAILBOX
		depends on ARCH_HISI \|\| COMPILE_TEST
		default ARCH_HISI
		help
		Build the Hisilicon Hi6220 clock driver based on the common clock framework.

		config STUB_CLK_HI6220
		bool "Hi6220 Stub Clock Driver"
		depends on COMMON_CLK_HI6220 && MAILBOX
		help
		Build the Hisilicon Hi6220 stub clock driver.

+2 −1

Original line number	Diff line number	Diff line
		@@ -7,4 +7,5 @@ obj-y += clk.o clkgate-separated.o clkdivider-hi6220.o
		obj-$(CONFIG_ARCH_HI3xxx) += clk-hi3620.o
		obj-$(CONFIG_ARCH_HIP04) += clk-hip04.o
		obj-$(CONFIG_ARCH_HIX5HD2) += clk-hix5hd2.o
		obj-$(CONFIG_COMMON_CLK_HI6220) += clk-hi6220.o clk-hi6220-stub.o
		obj-$(CONFIG_COMMON_CLK_HI6220) += clk-hi6220.o
		obj-$(CONFIG_STUB_CLK_HI6220) += clk-hi6220-stub.o

+7 −2

Original line number	Diff line number	Diff line
		@@ -716,6 +716,8 @@ static const char *const rk3188_critical_clocks[] __initconst = {
		"aclk_cpu",
		"aclk_peri",
		"hclk_peri",
		"pclk_cpu",
		"pclk_peri",
		};

		static void __init rk3188_common_clk_init(struct device_node *np)
		@@ -744,8 +746,6 @@ static void __init rk3188_common_clk_init(struct device_node *np)

		rockchip_clk_register_branches(common_clk_branches,
		ARRAY_SIZE(common_clk_branches));
		rockchip_clk_protect_critical(rk3188_critical_clocks,
		ARRAY_SIZE(rk3188_critical_clocks));

		rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0),
		ROCKCHIP_SOFTRST_HIWORD_MASK);
		@@ -765,6 +765,8 @@ static void __init rk3066a_clk_init(struct device_node *np)
		mux_armclk_p, ARRAY_SIZE(mux_armclk_p),
		&rk3066_cpuclk_data, rk3066_cpuclk_rates,
		ARRAY_SIZE(rk3066_cpuclk_rates));
		rockchip_clk_protect_critical(rk3188_critical_clocks,
		ARRAY_SIZE(rk3188_critical_clocks));
		}
		CLK_OF_DECLARE(rk3066a_cru, "rockchip,rk3066a-cru", rk3066a_clk_init);

		@@ -801,6 +803,9 @@ static void __init rk3188a_clk_init(struct device_node *np)
		pr_warn("%s: missing clocks to reparent aclk_cpu_pre to gpll\n",
		__func__);
		}

		rockchip_clk_protect_critical(rk3188_critical_clocks,
		ARRAY_SIZE(rk3188_critical_clocks));
		}
		CLK_OF_DECLARE(rk3188a_cru, "rockchip,rk3188a-cru", rk3188a_clk_init);

+6 −0

Original line number	Diff line number	Diff line
		@@ -818,6 +818,10 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
		GATE(0, "sclk_timer00", "xin24m", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(24), 0, GFLAGS),
		};

		static const char *const rk3368_critical_clocks[] __initconst = {
		"pclk_pd_pmu",
		};

		static void __init rk3368_clk_init(struct device_node *np)
		{
		void __iomem *reg_base;
		@@ -862,6 +866,8 @@ static void __init rk3368_clk_init(struct device_node *np)
		RK3368_GRF_SOC_STATUS0);
		rockchip_clk_register_branches(rk3368_clk_branches,
		ARRAY_SIZE(rk3368_clk_branches));
		rockchip_clk_protect_critical(rk3368_critical_clocks,
		ARRAY_SIZE(rk3368_critical_clocks));

		rockchip_clk_register_armclk(ARMCLKB, "armclkb",
		mux_armclkb_p, ARRAY_SIZE(mux_armclkb_p),