Commit db4d52d3 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'clk-renesas-for-v4.17-tag1' of... 

Merge tag 'clk-renesas-for-v4.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull renesas clk driver updates for v4.17 from Geert Uytterhoeven:

  - Update legacy DT Kconfig default,
  - Add support for CPU (Z/Z2) clocks on R-Car H3 and M3-W,
  - Add support for the watchdog module clocks on R-Car Gen2 and RZ/G1,
  - Add support for the new R-Car M3-N and V3H SoCs.

* tag 'clk-renesas-for-v4.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: cpg-mssr: Add support for R-Car M3-N
  clk: renesas: cpg-mssr: add R8A77980 support
  dt-bindings: clock: add R8A77980 CPG core clock definitions
  clk: renesas: r8a7792: Add rwdt clock
  clk: renesas: r8a7794: Add rwdt clock
  clk: renesas: r8a7791/r8a7793: Add rwdt clock
  clk: renesas: r8a7790: Add rwdt clock
  clk: renesas: r8a7745: Add rwdt clock
  clk: renesas: r8a7743: Add rwdt clock
  clk: renesas: r8a7796: Add Z2 clock
  clk: renesas: r8a7796: Add Z clock
  clk: renesas: r8a7795: Add Z2 clock
  clk: renesas: r8a7795: Add Z clock
  clk: renesas: rcar-gen3: Add Z2 clock divider support
  clk: renesas: rcar-gen3: Add Z clock divider support
  clk: renesas: Stop enabling legacy DT clock support by default
parents 7928b2cb 7ce36da9

Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt

+4 −2
Original line number Diff line number Diff line
@@ -22,7 +22,9 @@ Required Properties: 
      - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2)

      - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)

      - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)

      - "renesas,r8a77965-cpg-mssr" for the r8a77965 SoC (R-Car M3-N)

      - "renesas,r8a77970-cpg-mssr" for the r8a77970 SoC (R-Car V3M)

      - "renesas,r8a77980-cpg-mssr" for the r8a77980 SoC (R-Car V3H)

      - "renesas,r8a77995-cpg-mssr" for the r8a77995 SoC (R-Car D3)



  - reg: Base address and length of the memory resource used by the CPG/MSSR
@@ -32,8 +34,8 @@ Required Properties: 
    clock-names

  - clock-names: List of external parent clock names. Valid names are:

      - "extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7792, r8a7793, r8a7794,

		 r8a7795, r8a7796, r8a77970, r8a77995)

      - "extalr" (r8a7795, r8a7796, r8a77970)

		 r8a7795, r8a7796, r8a77965, r8a77970, r8a77980, r8a77995)

      - "extalr" (r8a7795, r8a7796, r8a77965, r8a77970, r8a77980)

      - "usb_extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7793, r8a7794)



  - #clock-cells: Must be 2

drivers/clk/renesas/Kconfig

+12 −1
Original line number Diff line number Diff line
@@ -15,7 +15,9 @@ config CLK_RENESAS 
	select CLK_R8A7794 if ARCH_R8A7794

	select CLK_R8A7795 if ARCH_R8A7795

	select CLK_R8A7796 if ARCH_R8A7796

	select CLK_R8A77965 if ARCH_R8A77965

	select CLK_R8A77970 if ARCH_R8A77970

	select CLK_R8A77980 if ARCH_R8A77980

	select CLK_R8A77995 if ARCH_R8A77995

	select CLK_SH73A0 if ARCH_SH73A0
@@ -24,12 +26,13 @@ if CLK_RENESAS 
config CLK_RENESAS_LEGACY

	bool "Legacy DT clock support"

	depends on CLK_R8A7790 || CLK_R8A7791 || CLK_R8A7792 || CLK_R8A7794

	default y

	help

	  Enable backward compatibility with old device trees describing a

	  hierarchical representation of the various CPG and MSTP clocks.



	  Say Y if you want your kernel to work with old DTBs.

	  It is safe to say N if you use the DTS that is supplied with the

	  current kernel source tree.



# SoC

config CLK_EMEV2
@@ -96,10 +99,18 @@ config CLK_R8A7796 
	bool "R-Car M3-W clock support" if COMPILE_TEST

	select CLK_RCAR_GEN3_CPG



config CLK_R8A77965

	bool "R-Car M3-N clock support" if COMPILE_TEST

	select CLK_RCAR_GEN3_CPG



config CLK_R8A77970

	bool "R-Car V3M clock support" if COMPILE_TEST

	select CLK_RCAR_GEN3_CPG



config CLK_R8A77980

	bool "R-Car V3H clock support" if COMPILE_TEST

	select CLK_RCAR_GEN3_CPG



config CLK_R8A77995

	bool "R-Car D3 clock support" if COMPILE_TEST

	select CLK_RCAR_GEN3_CPG

drivers/clk/renesas/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -14,7 +14,9 @@ obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o 
obj-$(CONFIG_CLK_R8A7794)		+= r8a7794-cpg-mssr.o

obj-$(CONFIG_CLK_R8A7795)		+= r8a7795-cpg-mssr.o

obj-$(CONFIG_CLK_R8A7796)		+= r8a7796-cpg-mssr.o

obj-$(CONFIG_CLK_R8A77965)		+= r8a77965-cpg-mssr.o

obj-$(CONFIG_CLK_R8A77970)		+= r8a77970-cpg-mssr.o

obj-$(CONFIG_CLK_R8A77980)		+= r8a77980-cpg-mssr.o

obj-$(CONFIG_CLK_R8A77995)		+= r8a77995-cpg-mssr.o

obj-$(CONFIG_CLK_SH73A0)		+= clk-sh73a0.o

drivers/clk/renesas/r8a7743-cpg-mssr.c

+2 −0
Original line number Diff line number Diff line
@@ -117,6 +117,7 @@ static const struct mssr_mod_clk r8a7743_mod_clks[] __initconst = { 
	DEF_MOD("cmt1",			 329,	R8A7743_CLK_R),

	DEF_MOD("usbhs-dmac0",		 330,	R8A7743_CLK_HP),

	DEF_MOD("usbhs-dmac1",		 331,	R8A7743_CLK_HP),

	DEF_MOD("rwdt",			 402,	R8A7743_CLK_R),

	DEF_MOD("irqc",			 407,	R8A7743_CLK_CP),

	DEF_MOD("intc-sys",		 408,	R8A7743_CLK_ZS),

	DEF_MOD("audio-dmac1",		 501,	R8A7743_CLK_HP),
@@ -195,6 +196,7 @@ static const struct mssr_mod_clk r8a7743_mod_clks[] __initconst = { 
};



static const unsigned int r8a7743_crit_mod_clks[] __initconst = {

	MOD_CLK_ID(402),	/* RWDT */

	MOD_CLK_ID(408),	/* INTC-SYS (GIC) */

};

drivers/clk/renesas/r8a7745-cpg-mssr.c

+2 −0
Original line number Diff line number Diff line
@@ -114,6 +114,7 @@ static const struct mssr_mod_clk r8a7745_mod_clks[] __initconst = { 
	DEF_MOD("cmt1",			 329,	R8A7745_CLK_R),

	DEF_MOD("usbhs-dmac0",		 330,	R8A7745_CLK_HP),

	DEF_MOD("usbhs-dmac1",		 331,	R8A7745_CLK_HP),

	DEF_MOD("rwdt",			 402,	R8A7745_CLK_R),

	DEF_MOD("irqc",			 407,	R8A7745_CLK_CP),

	DEF_MOD("intc-sys",		 408,	R8A7745_CLK_ZS),

	DEF_MOD("audio-dmac0",		 502,	R8A7745_CLK_HP),
@@ -180,6 +181,7 @@ static const struct mssr_mod_clk r8a7745_mod_clks[] __initconst = { 
};



static const unsigned int r8a7745_crit_mod_clks[] __initconst = {

	MOD_CLK_ID(402),	/* RWDT */

	MOD_CLK_ID(408),	/* INTC-SYS (GIC) */

};

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