Commit db2c7c0a authored by Jeffrey Hugo's avatar Jeffrey Hugo Committed by Stephen Boyd
Browse files

clk: qcom: Add missing msm8998 gcc_bimc_gfx_clk 



gcc_bimc_gfx_clk is a required clock for booting the GPU and GPU SMMU.

Fixes: 4807c71c (arm64: dts: Add msm8998 SoC and MTP board support)
Signed-off-by: default avatarJeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lkml.kernel.org/r/20191217164913.4783-1-jeffrey.l.hugo@gmail.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 1ea7d2ca

drivers/clk/qcom/gcc-msm8998.c

+14 −0
Original line number Diff line number Diff line
@@ -1996,6 +1996,19 @@ static struct clk_branch gcc_gp3_clk = { 
	},

};



static struct clk_branch gcc_bimc_gfx_clk = {

	.halt_reg = 0x46040,

	.halt_check = BRANCH_HALT,

	.clkr = {

		.enable_reg = 0x46040,

		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "gcc_bimc_gfx_clk",

			.ops = &clk_branch2_ops,

		},

	},

};



static struct clk_branch gcc_gpu_bimc_gfx_clk = {

	.halt_reg = 0x71010,

	.halt_check = BRANCH_HALT,
@@ -2810,6 +2823,7 @@ static struct clk_regmap *gcc_msm8998_clocks[] = { 
	[GCC_GP1_CLK] = &gcc_gp1_clk.clkr,

	[GCC_GP2_CLK] = &gcc_gp2_clk.clkr,

	[GCC_GP3_CLK] = &gcc_gp3_clk.clkr,

	[GCC_BIMC_GFX_CLK] = &gcc_bimc_gfx_clk.clkr,

	[GCC_GPU_BIMC_GFX_CLK] = &gcc_gpu_bimc_gfx_clk.clkr,

	[GCC_GPU_BIMC_GFX_SRC_CLK] = &gcc_gpu_bimc_gfx_src_clk.clkr,

	[GCC_GPU_CFG_AHB_CLK] = &gcc_gpu_cfg_ahb_clk.clkr,

include/dt-bindings/clock/qcom,gcc-msm8998.h

+1 −0
Original line number Diff line number Diff line
@@ -182,6 +182,7 @@ 
#define GCC_MSS_GPLL0_DIV_CLK_SRC				173

#define GCC_MSS_SNOC_AXI_CLK					174

#define GCC_MSS_MNOC_BIMC_AXI_CLK				175

#define GCC_BIMC_GFX_CLK					176



#define PCIE_0_GDSC						0

#define UFS_GDSC						1

CRA Git | Maintained and supported by SUSTech CRA and CCSE