Commit db2039fc authored by Faiz Abbas's avatar Faiz Abbas Committed by Ulf Hansson
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mmc: sdhci-omap: Fix DCRC error handling during tuning 



Commit 7d33c358 ("mmc: sdhci-omap: Workaround for Errata i802")
disabled DCRC interrupts during tuning. This write to the interrupt
enable register gets overwritten in sdhci_prepare_data() and the
interrupt is not in fact disabled. Fix this by disabling the interrupt
in the host->ier variable.

Fixes: 7d33c358 ("mmc: sdhci-omap: Workaround for Errata i802")
Cc: <stable@vger.kernel.org>
Signed-off-by: default avatarFaiz Abbas <faiz_abbas@ti.com>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent e8cde625

drivers/mmc/host/sdhci-omap.c

+8 −4
Original line number Diff line number Diff line
@@ -288,9 +288,9 @@ static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode) 
	struct device *dev = omap_host->dev;

	struct mmc_ios *ios = &mmc->ios;

	u32 start_window = 0, max_window = 0;

	bool dcrc_was_enabled = false;

	u8 cur_match, prev_match = 0;

	u32 length = 0, max_len = 0;

	u32 ier = host->ier;

	u32 phase_delay = 0;

	int ret = 0;

	u32 reg;
@@ -317,9 +317,10 @@ static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode) 
	 * during the tuning procedure. So disable it during the

	 * tuning procedure.

	 */

	ier &= ~SDHCI_INT_DATA_CRC;

	sdhci_writel(host, ier, SDHCI_INT_ENABLE);

	sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE);

	if (host->ier & SDHCI_INT_DATA_CRC) {

		host->ier &= ~SDHCI_INT_DATA_CRC;

		dcrc_was_enabled = true;

	}



	while (phase_delay <= MAX_PHASE_DELAY) {

		sdhci_omap_set_dll(omap_host, phase_delay);
@@ -366,6 +367,9 @@ tuning_error: 


ret:

	sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);

	/* Reenable forbidden interrupt */

	if (dcrc_was_enabled)

		host->ier |= SDHCI_INT_DATA_CRC;

	sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);

	sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);

	return ret;

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