Commit daaed104 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/pm' into next

* pci/pm:
  x86/platform/intel-mid: Constify mid_pci_platform_pm
  PCI: pciehp: Add runtime PM support for PCIe hotplug ports
  ACPI / hotplug / PCI: Make device_is_managed_by_native_pciehp() public
  ACPI / hotplug / PCI: Use cached copy of PCI_EXP_SLTCAP_HPC bit
  PCI: Unfold conditions to block runtime PM on PCIe ports
  PCI: Consolidate conditions to allow runtime PM on PCIe ports
  PCI: Activate runtime PM on a PCIe port only if it can suspend
  PCI: Speed up algorithm in pci_bridge_d3_update()
  PCI: Autosense device removal in pci_bridge_d3_update()
  PCI: Don't acquire ref on parent in pci_bridge_d3_update()
  USB: UHCI: report non-PME wakeup signalling for Intel hardware
  PCI: Check for PME in targeted sleep state
parents db5ba864 c9312254
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+1 −1
Original line number Diff line number Diff line
@@ -320,7 +320,7 @@ void pci_bus_add_device(struct pci_dev *dev)
	pci_fixup_device(pci_fixup_final, dev);
	pci_create_sysfs_dev_files(dev);
	pci_proc_attach_device(dev);
	pci_bridge_d3_device_changed(dev);
	pci_bridge_d3_update(dev);

	dev->match_driver = true;
	retval = device_attach(&dev->dev);
+1 −30
Original line number Diff line number Diff line
@@ -222,35 +222,6 @@ static void acpiphp_post_dock_fixup(struct acpi_device *adev)
	acpiphp_let_context_go(context);
}

/* Check whether the PCI device is managed by native PCIe hotplug driver */
static bool device_is_managed_by_native_pciehp(struct pci_dev *pdev)
{
	u32 reg32;
	acpi_handle tmp;
	struct acpi_pci_root *root;

	/* Check whether the PCIe port supports native PCIe hotplug */
	if (pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &reg32))
		return false;
	if (!(reg32 & PCI_EXP_SLTCAP_HPC))
		return false;

	/*
	 * Check whether native PCIe hotplug has been enabled for
	 * this PCIe hierarchy.
	 */
	tmp = acpi_find_root_bridge_handle(pdev);
	if (!tmp)
		return false;
	root = acpi_pci_find_root(tmp);
	if (!root)
		return false;
	if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
		return false;

	return true;
}

/**
 * acpiphp_add_context - Add ACPIPHP context to an ACPI device object.
 * @handle: ACPI handle of the object to add a context to.
@@ -334,7 +305,7 @@ static acpi_status acpiphp_add_context(acpi_handle handle, u32 lvl, void *data,
	 * expose slots to user space in those cases.
	 */
	if ((acpi_pci_check_ejectable(pbus, handle) || is_dock_device(adev))
	    && !(pdev && device_is_managed_by_native_pciehp(pdev))) {
	    && !(pdev && pdev->is_hotplug_bridge && pciehp_is_native(pdev))) {
		unsigned long long sun;
		int retval;

+6 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/pm_runtime.h>
#include <linux/pci.h>
#include "../pci.h"
#include "pciehp.h"
@@ -98,6 +99,7 @@ static int board_added(struct slot *p_slot)
	pciehp_green_led_blink(p_slot);

	/* Check link training status */
	pm_runtime_get_sync(&ctrl->pcie->port->dev);
	retval = pciehp_check_link_status(ctrl);
	if (retval) {
		ctrl_err(ctrl, "Failed to check link status\n");
@@ -118,12 +120,14 @@ static int board_added(struct slot *p_slot)
		if (retval != -EEXIST)
			goto err_exit;
	}
	pm_runtime_put(&ctrl->pcie->port->dev);

	pciehp_green_led_on(p_slot);
	pciehp_set_attention_status(p_slot, 0);
	return 0;

err_exit:
	pm_runtime_put(&ctrl->pcie->port->dev);
	set_slot_off(ctrl, p_slot);
	return retval;
}
@@ -137,7 +141,9 @@ static int remove_board(struct slot *p_slot)
	int retval;
	struct controller *ctrl = p_slot->ctrl;

	pm_runtime_get_sync(&ctrl->pcie->port->dev);
	retval = pciehp_unconfigure_device(p_slot);
	pm_runtime_put(&ctrl->pcie->port->dev);
	if (retval)
		return retval;

+24 −0
Original line number Diff line number Diff line
@@ -369,6 +369,30 @@ int pci_get_hp_params(struct pci_dev *dev, struct hotplug_params *hpp)
}
EXPORT_SYMBOL_GPL(pci_get_hp_params);

/**
 * pciehp_is_native - Check whether a hotplug port is handled by the OS
 * @pdev: Hotplug port to check
 *
 * Walk up from @pdev to the host bridge, obtain its cached _OSC Control Field
 * and return the value of the "PCI Express Native Hot Plug control" bit.
 * On failure to obtain the _OSC Control Field return %false.
 */
bool pciehp_is_native(struct pci_dev *pdev)
{
	struct acpi_pci_root *root;
	acpi_handle handle;

	handle = acpi_find_root_bridge_handle(pdev);
	if (!handle)
		return false;

	root = acpi_pci_find_root(handle);
	if (!root)
		return false;

	return root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
}

/**
 * pci_acpi_wake_bus - Root bus wakeup notification fork function.
 * @work: Work item to handle.
+1 −1
Original line number Diff line number Diff line
@@ -49,7 +49,7 @@ static bool mid_pci_need_resume(struct pci_dev *dev)
	return false;
}

static struct pci_platform_pm_ops mid_pci_platform_pm = {
static const struct pci_platform_pm_ops mid_pci_platform_pm = {
	.is_manageable	= mid_pci_power_manageable,
	.set_state	= mid_pci_set_power_state,
	.choose_state	= mid_pci_choose_state,
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