Commit da904174 authored by Stanislav Lisovskiy's avatar Stanislav Lisovskiy Committed by Jani Nikula
Browse files

drm/i915: Add YUV444 packed format support for skl+ 



PLANE_CTL_FORMAT_AYUV is already supported, according to hardware
specification.

Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: default avatarBob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200407215546.5445-2-bob.j.paauwe@intel.com
parent a080bd99

drivers/gpu/drm/i915/display/intel_display.c

+5 −0
Original line number Diff line number Diff line
@@ -3342,6 +3342,8 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha) 
		return DRM_FORMAT_RGB565;

	case PLANE_CTL_FORMAT_NV12:

		return DRM_FORMAT_NV12;

	case PLANE_CTL_FORMAT_XYUV:

		return DRM_FORMAT_XYUV8888;

	case PLANE_CTL_FORMAT_P010:

		return DRM_FORMAT_P010;

	case PLANE_CTL_FORMAT_P012:
@@ -4586,6 +4588,8 @@ static u32 skl_plane_ctl_format(u32 pixel_format) 
	case DRM_FORMAT_XRGB16161616F:

	case DRM_FORMAT_ARGB16161616F:

		return PLANE_CTL_FORMAT_XRGB_16161616F;

	case DRM_FORMAT_XYUV8888:

		return PLANE_CTL_FORMAT_XYUV;

	case DRM_FORMAT_YUYV:

		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;

	case DRM_FORMAT_YVYU:
@@ -6175,6 +6179,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, 
	case DRM_FORMAT_UYVY:

	case DRM_FORMAT_VYUY:

	case DRM_FORMAT_NV12:

	case DRM_FORMAT_XYUV8888:

	case DRM_FORMAT_P010:

	case DRM_FORMAT_P012:

	case DRM_FORMAT_P016:

drivers/gpu/drm/i915/display/intel_sprite.c

+8 −0
Original line number Diff line number Diff line
@@ -2503,6 +2503,7 @@ static const u32 skl_plane_formats[] = { 
	DRM_FORMAT_YVYU,

	DRM_FORMAT_UYVY,

	DRM_FORMAT_VYUY,

	DRM_FORMAT_XYUV8888,

};



static const u32 skl_planar_formats[] = {
@@ -2521,6 +2522,7 @@ static const u32 skl_planar_formats[] = { 
	DRM_FORMAT_UYVY,

	DRM_FORMAT_VYUY,

	DRM_FORMAT_NV12,

	DRM_FORMAT_XYUV8888,

};



static const u32 glk_planar_formats[] = {
@@ -2539,6 +2541,7 @@ static const u32 glk_planar_formats[] = { 
	DRM_FORMAT_UYVY,

	DRM_FORMAT_VYUY,

	DRM_FORMAT_NV12,

	DRM_FORMAT_XYUV8888,

	DRM_FORMAT_P010,

	DRM_FORMAT_P012,

	DRM_FORMAT_P016,
@@ -2562,6 +2565,7 @@ static const u32 icl_sdr_y_plane_formats[] = { 
	DRM_FORMAT_Y210,

	DRM_FORMAT_Y212,

	DRM_FORMAT_Y216,

	DRM_FORMAT_XYUV8888,

	DRM_FORMAT_XVYU2101010,

	DRM_FORMAT_XVYU12_16161616,

	DRM_FORMAT_XVYU16161616,
@@ -2589,6 +2593,7 @@ static const u32 icl_sdr_uv_plane_formats[] = { 
	DRM_FORMAT_Y210,

	DRM_FORMAT_Y212,

	DRM_FORMAT_Y216,

	DRM_FORMAT_XYUV8888,

	DRM_FORMAT_XVYU2101010,

	DRM_FORMAT_XVYU12_16161616,

	DRM_FORMAT_XVYU16161616,
@@ -2620,6 +2625,7 @@ static const u32 icl_hdr_plane_formats[] = { 
	DRM_FORMAT_Y210,

	DRM_FORMAT_Y212,

	DRM_FORMAT_Y216,

	DRM_FORMAT_XYUV8888,

	DRM_FORMAT_XVYU2101010,

	DRM_FORMAT_XVYU12_16161616,

	DRM_FORMAT_XVYU16161616,
@@ -2790,6 +2796,7 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane, 
	case DRM_FORMAT_UYVY:

	case DRM_FORMAT_VYUY:

	case DRM_FORMAT_NV12:

	case DRM_FORMAT_XYUV8888:

	case DRM_FORMAT_P010:

	case DRM_FORMAT_P012:

	case DRM_FORMAT_P016:
@@ -2860,6 +2867,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, 
	case DRM_FORMAT_UYVY:

	case DRM_FORMAT_VYUY:

	case DRM_FORMAT_NV12:

	case DRM_FORMAT_XYUV8888:

	case DRM_FORMAT_P010:

	case DRM_FORMAT_P012:

	case DRM_FORMAT_P016:

drivers/gpu/drm/i915/i915_reg.h

+1 −1
Original line number Diff line number Diff line
@@ -6855,7 +6855,7 @@ enum { 
#define   PLANE_CTL_FORMAT_P012			(5 << 24)

#define   PLANE_CTL_FORMAT_XRGB_16161616F	(6 << 24)

#define   PLANE_CTL_FORMAT_P016			(7 << 24)

#define   PLANE_CTL_FORMAT_AYUV			(8 << 24)

#define   PLANE_CTL_FORMAT_XYUV			(8 << 24)

#define   PLANE_CTL_FORMAT_INDEXED		(12 << 24)

#define   PLANE_CTL_FORMAT_RGB_565		(14 << 24)

#define   ICL_PLANE_CTL_FORMAT_MASK		(0x1f << 23)

CRA Git | Maintained and supported by SUSTech CRA and CCSE