Commit da719a35 authored by Zhiyong Tao's avatar Zhiyong Tao Committed by Matthias Brugger
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arm64: dts: mt8183: add pinctrl device node 



The commit adds pinctrl device node for mt8183

Signed-off-by: default avatarZhiyong Tao <zhiyong.tao@mediatek.com>
Signed-off-by: default avatarErin Lo <erin.lo@mediatek.com>
Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent cc216dfd

arch/arm64/boot/dts/mediatek/mt8183.dtsi

+25 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
#include <dt-bindings/clock/mt8183-clk.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/interrupt-controller/irq.h>

#include "mt8183-pinfunc.h"



/ {

	compatible = "mediatek,mt8183";
@@ -204,6 +205,30 @@ 
			#clock-cells = <1>;

		};



		pio: pinctrl@10005000 {

			compatible = "mediatek,mt8183-pinctrl";

			reg = <0 0x10005000 0 0x1000>,

			      <0 0x11f20000 0 0x1000>,

			      <0 0x11e80000 0 0x1000>,

			      <0 0x11e70000 0 0x1000>,

			      <0 0x11e90000 0 0x1000>,

			      <0 0x11d30000 0 0x1000>,

			      <0 0x11d20000 0 0x1000>,

			      <0 0x11c50000 0 0x1000>,

			      <0 0x11f30000 0 0x1000>,

			      <0 0x1000b000 0 0x1000>;

			reg-names = "iocfg0", "iocfg1", "iocfg2",

				    "iocfg3", "iocfg4", "iocfg5",

				    "iocfg6", "iocfg7", "iocfg8",

				    "eint";

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pio 0 0 192>;

			interrupt-controller;

			interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;

			#interrupt-cells = <2>;

		};



		apmixedsys: syscon@1000c000 {

			compatible = "mediatek,mt8183-apmixedsys", "syscon";

			reg = <0 0x1000c000 0 0x1000>;

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