Commit da3fe7bd authored Nov 05, 2017 by Nikita Leshenko Committed by Paolo Bonzini Nov 17, 2017

KVM: x86: ioapic: Don't fire level irq when Remote IRR set



Avoid firing a level-triggered interrupt that has the Remote IRR bit set,
because that means that some CPU is already processing it. The Remote
IRR bit will be cleared after an EOI and the interrupt will refire
if the irq line is still asserted.

This behavior is aligned with QEMU's IOAPIC implementation that was
introduced by commit f99b86b94987
("x86: ioapic: ignore level irq during processing") in QEMU.

Signed-off-by: Nikita Leshenko <nikita.leshchenko@oracle.com>
Reviewed-by: Liran Alon <liran.alon@oracle.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Wanpeng Li <wanpeng.li@hotmail.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>

parent 0fc5a36d

arch/x86/kvm/ioapic.c

+3 −1

Original line number	Diff line number	Diff line
		@@ -323,7 +323,9 @@ static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
		struct kvm_lapic_irq irqe;
		int ret;

		if (entry->fields.mask)
		if (entry->fields.mask \|\|
		(entry->fields.trig_mode == IOAPIC_LEVEL_TRIG &&
		entry->fields.remote_irr))
		return -1;

		ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "

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