Commit da29334c authored Sep 27, 2019 by Chris Packham Committed by Gregory CLEMENT Oct 08, 2019

ARM: dts: armada-xp: enable L2 cache parity and ecc on db-xc3-24g4xg



Enable L2 cache parity and ECC on the db-xc3-24g4xg board so that cache
operations are protected and errors can be flagged to the EDAC
subsystem.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

parent 3e530324

arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts

+5 −0

Original line number	Diff line number	Diff line
		@@ -33,6 +33,11 @@
		};
		};

		&L2 {
		arm,parity-enable;
		marvell,ecc-enable;
		};

		&devbus_bootcs {
		status = "okay";

Admin message