clk: x86: Change name from ST to FCH

# SPDX-License-Identifier: GPL-2.0-only

obj-$(CONFIG_PMC_ATOM)		+= clk-pmc-atom.o

obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE)	+= clk-st.o

obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE)	+= clk-fch.o

clk-x86-lpss-objs		:= clk-lpt.o

obj-$(CONFIG_X86_INTEL_LPSS)	+= clk-x86-lpss.o

obj-$(CONFIG_CLK_LGM_CGU)	+= clk-cgu.o clk-cgu-pll.o clk-lgm.o

static const char * const clk_oscout1_parents[] = { "clk48MHz", "clk25MHz" };

static struct clk_hw *hws[ST_MAX_CLKS];

static int st_clk_probe(struct platform_device *pdev)

static int fch_clk_probe(struct platform_device *pdev)

{

	struct fch_clk_data *st_data;

	struct fch_clk_data *fch_data;

	st_data = dev_get_platdata(&pdev->dev);

	if (!st_data || !st_data->base)

	fch_data = dev_get_platdata(&pdev->dev);

	if (!fch_data || !fch_data->base)

		return -EINVAL;

	hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", NULL, 0,

	hws[ST_CLK_MUX] = clk_hw_register_mux(NULL, "oscout1_mux",

		clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents),

		0, st_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NULL);

		0, fch_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NULL);

	clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_48M]->clk);

	hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", "oscout1_mux",

		0, st_data->base + MISCCLKCNTL1, OSCCLKENB,

		0, fch_data->base + MISCCLKCNTL1, OSCCLKENB,

		CLK_GATE_SET_TO_DISABLE, NULL);

	devm_clk_hw_register_clkdev(&pdev->dev, hws[ST_CLK_GATE], "oscout1",

	return 0;

}

static int st_clk_remove(struct platform_device *pdev)

static int fch_clk_remove(struct platform_device *pdev)

{

	int i;

	return 0;

}

static struct platform_driver st_clk_driver = {

static struct platform_driver fch_clk_driver = {

	.driver = {

		.name = "clk-st",

		.name = "clk-fch",

		.suppress_bind_attrs = true,

	},

	.probe = st_clk_probe,

	.remove = st_clk_remove,

	.probe = fch_clk_probe,

	.remove = fch_clk_remove,

};

builtin_platform_driver(st_clk_driver);

builtin_platform_driver(fch_clk_driver);