Commit d98930f5 authored by Prike Liang's avatar Prike Liang Committed by Alex Deucher
Browse files

drm/amdgpu: enable BIF clock gating for rn 



Enable BIF light sleep clock gating.

Signed-off-by: default avatarPrike Liang <Prike.Liang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ef0e7d08

drivers/gpu/drm/amd/amdgpu/soc15.c

+2 −1
Original line number Diff line number Diff line
@@ -1165,7 +1165,8 @@ static int soc15_common_early_init(void *handle) 
				 AMD_CG_SUPPORT_MC_MGCG |

				 AMD_CG_SUPPORT_MC_LS |

				 AMD_CG_SUPPORT_SDMA_MGCG |

				 AMD_CG_SUPPORT_SDMA_LS;

				 AMD_CG_SUPPORT_SDMA_LS |

				 AMD_CG_SUPPORT_BIF_LS;

		adev->pg_flags = 0;

		adev->external_rev_id = adev->rev_id + 0x91;

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