[PATCH] x86_64: Fix some comments in tlbflush.h (d970a521) · Commits · 戴 / test

include/asm-x86_64/tlbflush.h

+6 −3

Original line number	Diff line number	Diff line
		@@ -56,8 +56,9 @@ extern unsigned long pgkern_mask;
		* - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
		* - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
		*
		* ..but the x86_64 has somewhat limited tlb flushing capabilities,
		* and page-granular flushes are available only on i486 and up.
		* x86-64 can only flush individual pages or full VMs. For a range flush
		* we always do the full VM. Might be worth trying if for a small
		* range a few INVLPGs in a row are a win.
		*/

		#ifndef CONFIG_SMP
		@@ -115,7 +116,9 @@ static inline void flush_tlb_range(struct vm_area_struct * vma, unsigned long st
		static inline void flush_tlb_pgtables(struct mm_struct *mm,
		unsigned long start, unsigned long end)
		{
		/* x86_64 does not keep any page table caches in TLB */
		/* x86_64 does not keep any page table caches in a software TLB.
		The CPUs do in their hardware TLBs, but they are handled
		by the normal TLB flushing algorithms. */
		}

		#endif /* _X8664_TLBFLUSH_H */