Commit d952bd07 authored by James Hogan's avatar James Hogan
Browse files

MIPS: KVM: Wire up MSA capability 



Now that the code is in place for KVM to support MIPS SIMD Architecutre
(MSA) in MIPS guests, wire up the new KVM_CAP_MIPS_MSA capability.

For backwards compatibility, the capability must be explicitly enabled
in order to detect or make use of MSA from the guest.

The capability is not supported if the hardware supports MSA vector
partitioning, since the extra support cannot be tested yet and it
extends the state that the userland program would have to save.

Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Acked-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Gleb Natapov <gleb@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Cc: linux-api@vger.kernel.org
Cc: linux-doc@vger.kernel.org
parent ab86bd60

Documentation/virtual/kvm/api.txt

+12 −0
Original line number Diff line number Diff line
@@ -3335,6 +3335,18 @@ done the KVM_REG_MIPS_FPR_* and KVM_REG_MIPS_FCR_* registers can be accessed 
Config5.FRE bits are accessible via the KVM API and also from the guest,

depending on them being supported by the FPU.



6.10 KVM_CAP_MIPS_MSA



Architectures: mips

Target: vcpu

Parameters: args[0] is reserved for future use (should be 0).



This capability allows the use of the MIPS SIMD Architecture (MSA) by the guest.

It allows the Config3.MSAP bit to be set to enable the use of MSA by the guest.

Once this is done the KVM_REG_MIPS_VEC_* and KVM_REG_MIPS_MSA_* registers can be

accessed, and the Config5.MSAEn bit is accessible via the KVM API and also from

the guest.



7. Capabilities that can be enabled on VMs

------------------------------------------

arch/mips/kvm/mips.c

+18 −0
Original line number Diff line number Diff line
@@ -880,6 +880,9 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu, 
	case KVM_CAP_MIPS_FPU:

		vcpu->arch.fpu_enabled = true;

		break;

	case KVM_CAP_MIPS_MSA:

		vcpu->arch.msa_enabled = true;

		break;

	default:

		r = -EINVAL;

		break;
@@ -1071,6 +1074,21 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) 
	case KVM_CAP_MIPS_FPU:

		r = !!cpu_has_fpu;

		break;

	case KVM_CAP_MIPS_MSA:

		/*

		 * We don't support MSA vector partitioning yet:

		 * 1) It would require explicit support which can't be tested

		 *    yet due to lack of support in current hardware.

		 * 2) It extends the state that would need to be saved/restored

		 *    by e.g. QEMU for migration.

		 *

		 * When vector partitioning hardware becomes available, support

		 * could be added by requiring a flag when enabling

		 * KVM_CAP_MIPS_MSA capability to indicate that userland knows

		 * to save/restore the appropriate extra state.

		 */

		r = cpu_has_msa && !(boot_cpu_data.msa_id & MSA_IR_WRPF);

		break;

	default:

		r = 0;

		break;

include/uapi/linux/kvm.h

+1 −0
Original line number Diff line number Diff line
@@ -803,6 +803,7 @@ struct kvm_ppc_smmu_info { 
#define KVM_CAP_S390_USER_STSI 109

#define KVM_CAP_S390_SKEYS 110

#define KVM_CAP_MIPS_FPU 111

#define KVM_CAP_MIPS_MSA 112



#ifdef KVM_CAP_IRQ_ROUTING

CRA Git | Maintained and supported by SUSTech CRA and CCSE