Commit d9358563 authored by Ezequiel Garcia's avatar Ezequiel Garcia Committed by Mauro Carvalho Chehab
Browse files

media: uapi: h264: Clean slice invariants syntax elements 



The H.264 specification requires in section 7.4.3 "Slice header semantics",
that the following values shall be the same in all slice headers:

  pic_parameter_set_id
  frame_num
  field_pic_flag
  bottom_field_flag
  idr_pic_id
  pic_order_cnt_lsb
  delta_pic_order_cnt_bottom
  delta_pic_order_cnt[ 0 ]
  delta_pic_order_cnt[ 1 ]
  sp_for_switch_flag
  slice_group_change_cycle

These bitstream fields are part of the slice header, and therefore
passed redundantly on each slice. The purpose of the redundancy
is to make the codec fault-tolerant in network scenarios.

This is of course not needed to be reflected in the V4L2 controls,
given the bitstream has already been parsed by applications.
Therefore, move the redundant fields to the per-frame decode
parameters control (DECODE_PARAMS).

Field 'pic_parameter_set_id' is simply removed in this case,
because the PPS control must currently contain the active PPS.

Syntax elements dec_ref_pic_marking() and those related
to pic order count, remain invariant as well, and therefore,
the fields dec_ref_pic_marking_bit_size and pic_order_cnt_bit_size
are also common to all slices.

Signed-off-by: default avatarEzequiel Garcia <ezequiel@collabora.com>
Reviewed-by: default avatarNicolas Dufresne <nicolas.dufresne@collabora.com>
Tested-by: default avatarJonas Karlman <jonas@kwiboo.se>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 2287c5e6

Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst

+43 −43
Original line number Diff line number Diff line
@@ -1766,44 +1766,12 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - 
    * - __u8

      - ``slice_type``

      -

    * - __u8

      - ``pic_parameter_set_id``

      -

    * - __u8

      - ``colour_plane_id``

      -

    * - __u8

      - ``redundant_pic_cnt``

      -

    * - __u16

      - ``frame_num``

      -

    * - __u16

      - ``idr_pic_id``

      -

    * - __u16

      - ``pic_order_cnt_lsb``

      -

    * - __s32

      - ``delta_pic_order_cnt_bottom``

      -

    * - __s32

      - ``delta_pic_order_cnt0``

      -

    * - __s32

      - ``delta_pic_order_cnt1``

      -

    * - struct :c:type:`v4l2_h264_pred_weight_table`

      - ``pred_weight_table``

      -

    * - __u32

      - ``dec_ref_pic_marking_bit_size``

      - Size in bits of the dec_ref_pic_marking() syntax element.

    * - __u32

      - ``pic_order_cnt_bit_size``

      - Combined size in bits of the picture order count related syntax

        elements: pic_order_cnt_lsb, delta_pic_order_cnt_bottom,

        delta_pic_order_cnt0, and delta_pic_order_cnt1.

    * - __u8

      - ``cabac_init_idc``

      -
@@ -1830,9 +1798,9 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - 
      - ``num_ref_idx_l1_active_minus1``

      - If num_ref_idx_active_override_flag is not set, this field must be

        set to the value of num_ref_idx_l1_default_active_minus1.

    * - __u32

      - ``slice_group_change_cycle``

      -

    * - __u8

      - ``reserved``

      - Applications and drivers must set this to zero.

    * - struct :c:type:`v4l2_h264_reference`

      - ``ref_pic_list0[32]``

      - Reference picture list after applying the per-slice modifications
@@ -1854,17 +1822,11 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - 
    :stub-columns: 0

    :widths:       1 1 2



    * - ``V4L2_H264_SLICE_FLAG_FIELD_PIC``

      - 0x00000001

      -

    * - ``V4L2_H264_SLICE_FLAG_BOTTOM_FIELD``

      - 0x00000002

      -

    * - ``V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED``

      - 0x00000004

      - 0x00000001

      -

    * - ``V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH``

      - 0x00000008

      - 0x00000002

      -



``V4L2_CID_MPEG_VIDEO_H264_PRED_WEIGHTS (struct)``
@@ -1990,12 +1952,44 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - 
    * - __u16

      - ``nal_ref_idc``

      - NAL reference ID value coming from the NAL Unit header

    * - __u16

      - ``frame_num``

      -

    * - __s32

      - ``top_field_order_cnt``

      - Picture Order Count for the coded top field

    * - __s32

      - ``bottom_field_order_cnt``

      - Picture Order Count for the coded bottom field

    * - __u16

      - ``idr_pic_id``

      -

    * - __u16

      - ``pic_order_cnt_lsb``

      -

    * - __s32

      - ``delta_pic_order_cnt_bottom``

      -

    * - __s32

      - ``delta_pic_order_cnt0``

      -

    * - __s32

      - ``delta_pic_order_cnt1``

      -

    * - __u32

      - ``dec_ref_pic_marking_bit_size``

      - Size in bits of the dec_ref_pic_marking() syntax element.

    * - __u32

      - ``pic_order_cnt_bit_size``

      - Combined size in bits of the picture order count related syntax

        elements: pic_order_cnt_lsb, delta_pic_order_cnt_bottom,

        delta_pic_order_cnt0, and delta_pic_order_cnt1.

    * - __u32

      - ``slice_group_change_cycle``

      -

    * - __u32

      - ``reserved``

      - Applications and drivers must set this to zero.

    * - __u32

      - ``flags``

      - See :ref:`Decode Parameters Flags <h264_decode_params_flags>`
@@ -2014,6 +2008,12 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - 
    * - ``V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC``

      - 0x00000001

      - That picture is an IDR picture

    * - ``V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC``

      - 0x00000002

      -

    * - ``V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD``

      - 0x00000004

      -



.. c:type:: v4l2_h264_dpb_entry

drivers/media/v4l2-core/v4l2-ctrls.c

+7 −0
Original line number Diff line number Diff line
@@ -1737,6 +1737,7 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, 
{

	struct v4l2_ctrl_mpeg2_slice_params *p_mpeg2_slice_params;

	struct v4l2_ctrl_vp8_frame_header *p_vp8_frame_header;

	struct v4l2_ctrl_h264_slice_params *p_h264_slice_params;

	struct v4l2_ctrl_h264_decode_params *p_h264_dec_params;

	struct v4l2_ctrl_hevc_sps *p_hevc_sps;

	struct v4l2_ctrl_hevc_pps *p_hevc_pps;
@@ -1798,7 +1799,12 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, 
	case V4L2_CTRL_TYPE_H264_PPS:

	case V4L2_CTRL_TYPE_H264_SCALING_MATRIX:

	case V4L2_CTRL_TYPE_H264_PRED_WEIGHTS:

		break;



	case V4L2_CTRL_TYPE_H264_SLICE_PARAMS:

		p_h264_slice_params = p;



		zero_reserved(*p_h264_slice_params);

		break;



	case V4L2_CTRL_TYPE_H264_DECODE_PARAMS:
@@ -1810,6 +1816,7 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, 


			zero_reserved(*dpb_entry);

		}

		zero_reserved(*p_h264_dec_params);

		break;



	case V4L2_CTRL_TYPE_VP8_FRAME_HEADER:

drivers/media/v4l2-core/v4l2-h264.c

+3 −5
Original line number Diff line number Diff line
@@ -18,14 +18,12 @@ 
 *

 * @b: the builder context to initialize

 * @dec_params: decode parameters control

 * @slice_params: first slice parameters control

 * @sps: SPS control

 * @dpb: DPB to use when creating the reference list

 */

void

v4l2_h264_init_reflist_builder(struct v4l2_h264_reflist_builder *b,

		const struct v4l2_ctrl_h264_decode_params *dec_params,

		const struct v4l2_ctrl_h264_slice_params *slice_params,

		const struct v4l2_ctrl_h264_sps *sps,

		const struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES])

{
@@ -33,13 +31,13 @@ v4l2_h264_init_reflist_builder(struct v4l2_h264_reflist_builder *b, 
	unsigned int i;



	max_frame_num = 1 << (sps->log2_max_frame_num_minus4 + 4);

	cur_frame_num = slice_params->frame_num;

	cur_frame_num = dec_params->frame_num;



	memset(b, 0, sizeof(*b));

	if (!(slice_params->flags & V4L2_H264_SLICE_FLAG_FIELD_PIC))

	if (!(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC))

		b->cur_pic_order_count = min(dec_params->bottom_field_order_cnt,

					     dec_params->top_field_order_cnt);

	else if (slice_params->flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD)

	else if (dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD)

		b->cur_pic_order_count = dec_params->bottom_field_order_cnt;

	else

		b->cur_pic_order_count = dec_params->top_field_order_cnt;

drivers/staging/media/hantro/hantro_g1_h264_dec.c

+10 −11
Original line number Diff line number Diff line
@@ -23,7 +23,6 @@ static void set_params(struct hantro_ctx *ctx) 
{

	const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls;

	const struct v4l2_ctrl_h264_decode_params *dec_param = ctrls->decode;

	const struct v4l2_ctrl_h264_slice_params *slices = ctrls->slices;

	const struct v4l2_ctrl_h264_sps *sps = ctrls->sps;

	const struct v4l2_ctrl_h264_pps *pps = ctrls->pps;

	struct vb2_v4l2_buffer *src_buf = hantro_get_src_buf(ctx);
@@ -42,11 +41,11 @@ static void set_params(struct hantro_ctx *ctx) 


	if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY) &&

	    (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD ||

	     slices[0].flags & V4L2_H264_SLICE_FLAG_FIELD_PIC))

	     dec_param->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC))

		reg |= G1_REG_DEC_CTRL0_PIC_INTERLACE_E;

	if (slices[0].flags & V4L2_H264_SLICE_FLAG_FIELD_PIC)

	if (dec_param->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC)

		reg |= G1_REG_DEC_CTRL0_PIC_FIELDMODE_E;

	if (!(slices[0].flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD))

	if (!(dec_param->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD))

		reg |= G1_REG_DEC_CTRL0_PIC_TOPFIELD_E;

	vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL0);
@@ -75,7 +74,7 @@ static void set_params(struct hantro_ctx *ctx) 


	/* Decoder control register 4. */

	reg = G1_REG_DEC_CTRL4_FRAMENUM_LEN(sps->log2_max_frame_num_minus4 + 4) |

	      G1_REG_DEC_CTRL4_FRAMENUM(slices[0].frame_num) |

	      G1_REG_DEC_CTRL4_FRAMENUM(dec_param->frame_num) |

	      G1_REG_DEC_CTRL4_WEIGHT_BIPR_IDC(pps->weighted_bipred_idc);

	if (pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE)

		reg |= G1_REG_DEC_CTRL4_CABAC_E;
@@ -88,8 +87,8 @@ static void set_params(struct hantro_ctx *ctx) 
	vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL4);



	/* Decoder control register 5. */

	reg = G1_REG_DEC_CTRL5_REFPIC_MK_LEN(slices[0].dec_ref_pic_marking_bit_size) |

	      G1_REG_DEC_CTRL5_IDR_PIC_ID(slices[0].idr_pic_id);

	reg = G1_REG_DEC_CTRL5_REFPIC_MK_LEN(dec_param->dec_ref_pic_marking_bit_size) |

	      G1_REG_DEC_CTRL5_IDR_PIC_ID(dec_param->idr_pic_id);

	if (pps->flags & V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED)

		reg |= G1_REG_DEC_CTRL5_CONST_INTRA_E;

	if (pps->flags & V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT)
@@ -103,10 +102,10 @@ static void set_params(struct hantro_ctx *ctx) 
	vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL5);



	/* Decoder control register 6. */

	reg = G1_REG_DEC_CTRL6_PPS_ID(slices[0].pic_parameter_set_id) |

	reg = G1_REG_DEC_CTRL6_PPS_ID(pps->pic_parameter_set_id) |

	      G1_REG_DEC_CTRL6_REFIDX0_ACTIVE(pps->num_ref_idx_l0_default_active_minus1 + 1) |

	      G1_REG_DEC_CTRL6_REFIDX1_ACTIVE(pps->num_ref_idx_l1_default_active_minus1 + 1) |

	      G1_REG_DEC_CTRL6_POC_LENGTH(slices[0].pic_order_cnt_bit_size);

	      G1_REG_DEC_CTRL6_POC_LENGTH(dec_param->pic_order_cnt_bit_size);

	vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL6);



	/* Error concealment register. */
@@ -246,7 +245,7 @@ static void set_buffers(struct hantro_ctx *ctx) 
	/* Destination (decoded frame) buffer. */

	dst_dma = hantro_get_dec_buf_addr(ctx, &dst_buf->vb2_buf);

	/* Adjust dma addr to start at second line for bottom field */

	if (ctrls->slices[0].flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD)

	if (ctrls->decode->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD)

		offset = ALIGN(ctx->src_fmt.width, MB_DIM);

	vdpu_write_relaxed(vpu, dst_dma + offset, G1_REG_ADDR_DST);
@@ -265,7 +264,7 @@ static void set_buffers(struct hantro_ctx *ctx) 
		 * DMV buffer is split in two for field encoded frames,

		 * adjust offset for bottom field

		 */

		if (ctrls->slices[0].flags & V4L2_H264_SLICE_FLAG_BOTTOM_FIELD)

		if (ctrls->decode->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD)

			offset += 32 * MB_WIDTH(ctx->src_fmt.width) *

				  MB_HEIGHT(ctx->src_fmt.height);

		vdpu_write_relaxed(vpu, dst_dma + offset, G1_REG_ADDR_DIR_MV);

drivers/staging/media/hantro/hantro_h264.c

+1 −2
Original line number Diff line number Diff line
@@ -372,8 +372,7 @@ int hantro_h264_dec_prepare_run(struct hantro_ctx *ctx) 


	/* Build the P/B{0,1} ref lists. */

	v4l2_h264_init_reflist_builder(&reflist_builder, ctrls->decode,

				       &ctrls->slices[0], ctrls->sps,

				       ctx->h264_dec.dpb);

				       ctrls->sps, ctx->h264_dec.dpb);

	v4l2_h264_build_p_ref_list(&reflist_builder, h264_ctx->reflists.p);

	v4l2_h264_build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0,

				    h264_ctx->reflists.b1);

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