arm64: dts: m3ulcb: enable SCIF clk and pins (d92ce1a5) · Commits · 戴 / test

This enables the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by:

Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by:

Simon Horman <horms+renesas@verge.net.au>

arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts

+13 −0

Original line number	Original line	Diff line number	Diff line
	@@ -37,10 +37,18 @@
	};		};

	&pfc {		&pfc {
			pinctrl-0 = <&scif_clk_pins>;
			pinctrl-names = "default";

	scif2_pins: scif2 {		scif2_pins: scif2 {
	groups = "scif2_data_a";		groups = "scif2_data_a";
	function = "scif2";		function = "scif2";
	};		};

			scif_clk_pins: scif_clk {
			groups = "scif_clk_a";
			function = "scif_clk";
			};
	};		};

	&scif2 {		&scif2 {
	@@ -49,3 +57,8 @@

	status = "okay";		status = "okay";
	};		};

			&scif_clk {
			clock-frequency = <14745600>;
			status = "okay";
			};

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