pata_serverworks: add serverworks_fixup() (d912be2f) · Commits · 戴 / test

drivers/ata/pata_serverworks.c

+29 −28

Original line number	Diff line number	Diff line
		@@ -349,6 +349,31 @@ static void serverworks_fixup_ht1000(struct pci_dev *pdev)
		pci_write_config_byte(pdev, 0x5A, btr);
		}

		static int serverworks_fixup(struct pci_dev *pdev)
		{
		int rc = 0;

		/* Force master latency timer to 64 PCI clocks */
		pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);

		switch (pdev->device) {
		case PCI_DEVICE_ID_SERVERWORKS_OSB4IDE:
		rc = serverworks_fixup_osb4(pdev);
		break;
		case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
		ata_pci_bmdma_clear_simplex(pdev);
		/* fall through */
		case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
		case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
		rc = serverworks_fixup_csb(pdev);
		break;
		case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
		serverworks_fixup_ht1000(pdev);
		break;
		}

		return rc;
		}

		static int serverworks_init_one(struct pci_dev pdev, const struct pci_device_id id)
		{
		@@ -386,13 +411,12 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id
		if (rc)
		return rc;

		/* Force master latency timer to 64 PCI clocks */
		pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
		rc = serverworks_fixup(pdev);

		/* OSB4 : South Bridge and IDE */
		if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
		/* Select non UDMA capable OSB4 if we can't do fixups */
		if ( serverworks_fixup_osb4(pdev) < 0)
		if (rc < 0)
		ppi[0] = &info[1];
		}
		/* setup CSB5/CSB6 : South Bridge and IDE option RAID */
		@@ -402,19 +426,13 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id

		/* If the returned btr is the newer revision then
		select the right info block */
		if (serverworks_fixup_csb(pdev) == 3)
		if (rc == 3)
		ppi[0] = &info[3];

		/* Is this the 3rd channel CSB6 IDE ? */
		if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)
		ppi[1] = &ata_dummy_port_info;
		}
		/* setup HT1000E */
		else if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE)
		serverworks_fixup_ht1000(pdev);

		if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE)
		ata_pci_bmdma_clear_simplex(pdev);

		return ata_pci_bmdma_init_one(pdev, ppi, &serverworks_sht, NULL, 0);
		}
		@@ -429,24 +447,7 @@ static int serverworks_reinit_one(struct pci_dev *pdev)
		if (rc)
		return rc;

		/* Force master latency timer to 64 PCI clocks */
		pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);

		switch (pdev->device) {
		case PCI_DEVICE_ID_SERVERWORKS_OSB4IDE:
		serverworks_fixup_osb4(pdev);
		break;
		case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
		ata_pci_bmdma_clear_simplex(pdev);
		/* fall through */
		case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
		case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
		serverworks_fixup_csb(pdev);
		break;
		case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
		serverworks_fixup_ht1000(pdev);
		break;
		}
		(void)serverworks_fixup(pdev);

		ata_host_resume(host);
		return 0;

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