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For the purposes of platforms which use the codec as DAI clock master for the CPU and other codec devices, there is the need to not only expose the clock gating of BCLK and WCLK but also the ability to set those rates without going through the ASoC APIs. To make this possible, the previous CCF implementation in the driver has been extended to separate BCLK and WCLK out. WCLK is the parent clock to BCLK, and is also the clock gate for both. BCLK in HW is a factor/multiplier of WCLK so derives from whatever SR is chosen for WCLK, hence the need to make it a child of WCLK for the purposes of CCF. Enabling/disabling either BCLK or WCLK will result in clocks being ungated/gated accordingly. To simplify matters, these clocks can only be configured if the codec is set as master, otherwise CCF control is disallowed. Signed-off-by:Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by:
Mark Brown <broonie@kernel.org>
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