Commit d8bcaabe authored by Rob Herring's avatar Rob Herring Committed by Arnd Bergmann
Browse files

arm64: dts: fix unit-address leading 0s 



Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using
the following command:

perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm64/boot/dts -type -f -name '*.dts*'

Signed-off-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 8dccafaa

arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi

+8 −8
Original line number Diff line number Diff line
@@ -178,7 +178,7 @@ 
			#size-cells = <0>;

		};



		usb_otg: usb@01c19000 {

		usb_otg: usb@1c19000 {

			compatible = "allwinner,sun8i-a33-musb";

			reg = <0x01c19000 0x0400>;

			clocks = <&ccu CLK_BUS_OTG>;
@@ -191,7 +191,7 @@ 
			status = "disabled";

		};



		usbphy: phy@01c19400 {

		usbphy: phy@1c19400 {

			compatible = "allwinner,sun50i-a64-usb-phy";

			reg = <0x01c19400 0x14>,

			      <0x01c1a800 0x4>,
@@ -211,7 +211,7 @@ 
			#phy-cells = <1>;

		};



		ehci0: usb@01c1a000 {

		ehci0: usb@1c1a000 {

			compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";

			reg = <0x01c1a000 0x100>;

			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
@@ -223,7 +223,7 @@ 
			status = "disabled";

		};



		ohci0: usb@01c1a400 {

		ohci0: usb@1c1a400 {

			compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";

			reg = <0x01c1a400 0x100>;

			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
@@ -233,7 +233,7 @@ 
			status = "disabled";

		};



		ehci1: usb@01c1b000 {

		ehci1: usb@1c1b000 {

			compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";

			reg = <0x01c1b000 0x100>;

			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
@@ -247,7 +247,7 @@ 
			status = "disabled";

		};



		ohci1: usb@01c1b400 {

		ohci1: usb@1c1b400 {

			compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";

			reg = <0x01c1b400 0x100>;

			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
@@ -259,7 +259,7 @@ 
			status = "disabled";

		};



		ccu: clock@01c20000 {

		ccu: clock@1c20000 {

			compatible = "allwinner,sun50i-a64-ccu";

			reg = <0x01c20000 0x400>;

			clocks = <&osc24M>, <&osc32k>;
@@ -486,7 +486,7 @@ 
			#reset-cells = <1>;

		};



		r_pio: pinctrl@01f02c00 {

		r_pio: pinctrl@1f02c00 {

			compatible = "allwinner,sun50i-a64-r-pinctrl";

			reg = <0x01f02c00 0x400>;

			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;

arch/arm64/boot/dts/apm/apm-shadowcat.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@ 
		#address-cells = <2>;

		#size-cells = <0>;



		cpu@000 {

		cpu@0 {

			device_type = "cpu";

			compatible = "apm,strega", "arm,armv8";

			reg = <0x0 0x000>;
@@ -29,7 +29,7 @@ 
			#clock-cells = <1>;

			clocks = <&pmd0clk 0>;

		};

		cpu@001 {

		cpu@1 {

			device_type = "cpu";

			compatible = "apm,strega", "arm,armv8";

			reg = <0x0 0x001>;
@@ -125,7 +125,7 @@ 
		      <0x0 0x780a0000 0x0 0x20000>,	/* GIC CPU */

		      <0x0 0x780c0000 0x0 0x10000>,	/* GIC VCPU Control */

		      <0x0 0x780e0000 0x0 0x20000>;	/* GIC VCPU */

		v2m0: v2m@00000 {

		v2m0: v2m@0 {

			compatible = "arm,gic-v2m-frame";

			msi-controller;

			reg = <0x0 0x0 0x0 0x1000>;

arch/arm64/boot/dts/apm/apm-storm.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@ 
		#address-cells = <2>;

		#size-cells = <0>;



		cpu@000 {

		cpu@0 {

			device_type = "cpu";

			compatible = "apm,potenza", "arm,armv8";

			reg = <0x0 0x000>;
@@ -27,7 +27,7 @@ 
			cpu-release-addr = <0x1 0x0000fff8>;

			next-level-cache = <&xgene_L2_0>;

		};

		cpu@001 {

		cpu@1 {

			device_type = "cpu";

			compatible = "apm,potenza", "arm,armv8";

			reg = <0x0 0x001>;

arch/arm64/boot/dts/arm/foundation-v8.dtsi

+7 −7
Original line number Diff line number Diff line
@@ -97,7 +97,7 @@ 
		timeout-sec = <30>;

	};



	smb@08000000 {

	smb@8000000 {

		compatible = "arm,vexpress,v2m-p1", "simple-bus";

		arm,v2m-memory-map = "rs1";

		#address-cells = <2>; /* SMB chipselect number and offset */
@@ -189,12 +189,12 @@ 
			#size-cells = <1>;

			ranges = <0 3 0 0x200000>;



			v2m_sysreg: sysreg@010000 {

			v2m_sysreg: sysreg@10000 {

				compatible = "arm,vexpress-sysreg";

				reg = <0x010000 0x1000>;

			};



			v2m_serial0: uart@090000 {

			v2m_serial0: uart@90000 {

				compatible = "arm,pl011", "arm,primecell";

				reg = <0x090000 0x1000>;

				interrupts = <5>;
@@ -202,7 +202,7 @@ 
				clock-names = "uartclk", "apb_pclk";

			};



			v2m_serial1: uart@0a0000 {

			v2m_serial1: uart@a0000 {

				compatible = "arm,pl011", "arm,primecell";

				reg = <0x0a0000 0x1000>;

				interrupts = <6>;
@@ -210,7 +210,7 @@ 
				clock-names = "uartclk", "apb_pclk";

			};



			v2m_serial2: uart@0b0000 {

			v2m_serial2: uart@b0000 {

				compatible = "arm,pl011", "arm,primecell";

				reg = <0x0b0000 0x1000>;

				interrupts = <7>;
@@ -218,7 +218,7 @@ 
				clock-names = "uartclk", "apb_pclk";

			};



			v2m_serial3: uart@0c0000 {

			v2m_serial3: uart@c0000 {

				compatible = "arm,pl011", "arm,primecell";

				reg = <0x0c0000 0x1000>;

				interrupts = <8>;
@@ -226,7 +226,7 @@ 
				clock-names = "uartclk", "apb_pclk";

			};



			virtio-block@0130000 {

			virtio-block@130000 {

				compatible = "virtio,mmio";

				reg = <0x130000 0x200>;

				interrupts = <42>;

arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts

+1 −1
Original line number Diff line number Diff line
@@ -104,7 +104,7 @@ 
			     <0 63 4>;

	};



	smb@08000000 {

	smb@8000000 {

		compatible = "simple-bus";



		#address-cells = <2>;

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