Commit d867b95f authored by Suman Tripathi's avatar Suman Tripathi Committed by Tejun Heo
Browse files

ata: Remove the AHCI_HFLAG_EDGE_IRQ support from libahci. 



The flexibility to override the irq handles in the LLD's are already
present, so controllers implementing a edge trigger latch can
implement their own interrupt handler inside the driver.  This patch
removes the AHCI_HFLAG_EDGE_IRQ support from libahci and moves edge
irq handling to ahci_xgene.

tj: Minor update to description.

Signed-off-by: default avatarSuman Tripathi <stripathi@apm.com>
Signed-off-by: default avatarTejun Heo <tj@kenrel.org>
parent f070d671

drivers/ata/ahci.h

+1 −2
Original line number Diff line number Diff line
@@ -240,8 +240,7 @@ enum { 
						        error-handling stage) */

	AHCI_HFLAG_NO_DEVSLP		= (1 << 17), /* no device sleep */

	AHCI_HFLAG_NO_FBS		= (1 << 18), /* no FBS */

	AHCI_HFLAG_EDGE_IRQ		= (1 << 19), /* HOST_IRQ_STAT behaves as

							Edge Triggered */



#ifdef CONFIG_PCI_MSI

	AHCI_HFLAG_MULTI_MSI		= (1 << 20), /* multiple PCI MSIs */

	AHCI_HFLAG_MULTI_MSIX		= (1 << 21), /* per-port MSI-X */

drivers/ata/ahci_xgene.c

+39 −1
Original line number Diff line number Diff line
@@ -548,6 +548,43 @@ softreset_retry: 
	return rc;

}



static irqreturn_t xgene_ahci_irq_intr(int irq, void *dev_instance)

{

	struct ata_host *host = dev_instance;

	struct ahci_host_priv *hpriv;

	unsigned int rc = 0;

	void __iomem *mmio;

	u32 irq_stat, irq_masked;



	VPRINTK("ENTER\n");



	hpriv = host->private_data;

	mmio = hpriv->mmio;



	/* sigh.  0xffffffff is a valid return from h/w */

	irq_stat = readl(mmio + HOST_IRQ_STAT);

	if (!irq_stat)

		return IRQ_NONE;



	irq_masked = irq_stat & hpriv->port_map;



	spin_lock(&host->lock);



	/*

	 * HOST_IRQ_STAT behaves as edge triggered latch meaning that

	 * it should be cleared before all the port events are cleared.

	 */

	writel(irq_stat, mmio + HOST_IRQ_STAT);



	rc = ahci_handle_port_intr(host, irq_masked);



	spin_unlock(&host->lock);



	VPRINTK("EXIT\n");



	return IRQ_RETVAL(rc);

}



static struct ata_port_operations xgene_ahci_v1_ops = {

	.inherits = &ahci_ops,

	.host_stop = xgene_ahci_host_stop,
@@ -779,7 +816,8 @@ skip_clk_phy: 
		hpriv->flags = AHCI_HFLAG_NO_NCQ;

		break;

	case XGENE_AHCI_V2:

		hpriv->flags |= AHCI_HFLAG_YES_FBS | AHCI_HFLAG_EDGE_IRQ;

		hpriv->flags |= AHCI_HFLAG_YES_FBS;

		hpriv->irq_handler = xgene_ahci_irq_intr;

		break;

	default:

		break;

drivers/ata/libahci.c

+1 −42
Original line number Diff line number Diff line
@@ -113,8 +113,6 @@ static ssize_t ahci_store_em_buffer(struct device *dev, 
				    const char *buf, size_t size);

static ssize_t ahci_show_em_supported(struct device *dev,

				      struct device_attribute *attr, char *buf);

static irqreturn_t ahci_single_edge_irq_intr(int irq, void *dev_instance);



static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance);



static DEVICE_ATTR(ahci_host_caps, S_IRUGO, ahci_show_host_caps, NULL);
@@ -517,9 +515,7 @@ void ahci_save_initial_config(struct device *dev, struct ahci_host_priv *hpriv) 
		hpriv->start_engine = ahci_start_engine;



	if (!hpriv->irq_handler)

		hpriv->irq_handler = (hpriv->flags & AHCI_HFLAG_EDGE_IRQ) ?

				     ahci_single_edge_irq_intr :

				     ahci_single_level_irq_intr;

		hpriv->irq_handler = ahci_single_level_irq_intr;

}

EXPORT_SYMBOL_GPL(ahci_save_initial_config);
@@ -1882,43 +1878,6 @@ u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked) 
}

EXPORT_SYMBOL_GPL(ahci_handle_port_intr);



static irqreturn_t ahci_single_edge_irq_intr(int irq, void *dev_instance)

{

	struct ata_host *host = dev_instance;

	struct ahci_host_priv *hpriv;

	unsigned int rc = 0;

	void __iomem *mmio;

	u32 irq_stat, irq_masked;



	VPRINTK("ENTER\n");



	hpriv = host->private_data;

	mmio = hpriv->mmio;



	/* sigh.  0xffffffff is a valid return from h/w */

	irq_stat = readl(mmio + HOST_IRQ_STAT);

	if (!irq_stat)

		return IRQ_NONE;



	irq_masked = irq_stat & hpriv->port_map;



	spin_lock(&host->lock);



	/*

	 * HOST_IRQ_STAT behaves as edge triggered latch meaning that

	 * it should be cleared before all the port events are cleared.

	 */

	writel(irq_stat, mmio + HOST_IRQ_STAT);



	rc = ahci_handle_port_intr(host, irq_masked);



	spin_unlock(&host->lock);



	VPRINTK("EXIT\n");



	return IRQ_RETVAL(rc);

}



static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance)

{

	struct ata_host *host = dev_instance;

CRA Git | Maintained and supported by SUSTech CRA and CCSE