Commit d83c7a07 authored by Jane Jian's avatar Jane Jian Committed by Alex Deucher
Browse files

drm/amdgpu: update VCN1(dual instances) fw types ID and VCN ip block type 



Previously there is no VCN1 type ID in psp gfx interface. Also add VCN ip
block type unless the reinit after FLR for sriov would fail.

Signed-off-by: default avatarJane Jian <Jane.Jian@amd.com>
Reviewed-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7daaebfe

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+2 −1
Original line number Diff line number Diff line
@@ -2441,7 +2441,8 @@ static int amdgpu_device_ip_reinit_late_sriov(struct amdgpu_device *adev) 
		AMD_IP_BLOCK_TYPE_GFX,

		AMD_IP_BLOCK_TYPE_SDMA,

		AMD_IP_BLOCK_TYPE_UVD,

		AMD_IP_BLOCK_TYPE_VCE

		AMD_IP_BLOCK_TYPE_VCE,

		AMD_IP_BLOCK_TYPE_VCN

	};



	for (i = 0; i < ARRAY_SIZE(ip_order); i++) {

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+3 −0
Original line number Diff line number Diff line
@@ -1310,6 +1310,9 @@ static int psp_get_fw_type(struct amdgpu_firmware_info *ucode, 
	case AMDGPU_UCODE_ID_VCN:

		*type = GFX_FW_TYPE_VCN;

		break;

	case AMDGPU_UCODE_ID_VCN1:

		*type = GFX_FW_TYPE_VCN1;

		break;

	case AMDGPU_UCODE_ID_DMCU_ERAM:

		*type = GFX_FW_TYPE_DMCU_ERAM;

		break;

drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h

+1 −0
Original line number Diff line number Diff line
@@ -242,6 +242,7 @@ enum psp_gfx_fw_type { 
	GFX_FW_TYPE_SDMA5                           = 55,   /* SDMA5                    MI      */

	GFX_FW_TYPE_SDMA6                           = 56,   /* SDMA6                    MI      */

	GFX_FW_TYPE_SDMA7                           = 57,   /* SDMA7                    MI      */

	GFX_FW_TYPE_VCN1                            = 58,   /* VCN1                     MI      */

	GFX_FW_TYPE_MAX

};

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