Commit d7f76ac4 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'ux500-dts-v5.2-armsoc' of...

Merge tag 'ux500-dts-v5.2-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt

Ux500 DTS changes for the v5.2 kernel cycle.
- This adds the MCDE display controller and some displays.
- The Lima MALI-400 driver is added to the kernel, so
  let's add this block to the Ux500 DTS file.

* tag 'ux500-dts-v5.2-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson

:
  ARM: dts: Ux500: Add MCDE and Samsung display
  ARM: dts: ux500: Add Mali-400

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents da9a4c3d f4bdfcc2
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+63 −11
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@@ -1196,21 +1196,73 @@
			status = "disabled";
		};

		gpu@a0300000 {
			/*
			 * This block is referred to as "Smart Graphics Adapter SGA500"
			 * in documentation but is in practice a pretty straight-forward
			 * MALI-400 GPU block.
			 */
			compatible = "stericsson,db8500-mali", "arm,mali-400";
			reg = <0xa0300000 0x10000>;
			interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "gp",
					  "gpmmu",
					  "pp0",
					  "ppmmu0",
					  "combined";
			clocks = <&prcmu_clk PRCMU_ACLK>, <&prcmu_clk PRCMU_SGACLK>;
			clock-names = "bus", "core";
			mali-supply = <&db8500_sga_reg>;
			power-domains = <&pm_domains DOMAIN_VAPE>;
		};

		mcde@a0350000 {
			compatible = "stericsson,mcde";
			reg = <0xa0350000 0x1000>, /* MCDE */
			      <0xa0351000 0x1000>, /* DSI link 1 */
			      <0xa0352000 0x1000>, /* DSI link 2 */
			      <0xa0353000 0x1000>; /* DSI link 3 */
			compatible = "ste,mcde";
			reg = <0xa0350000 0x1000>;
			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
			epod-supply = <&db8500_b2r2_mcde_reg>;
			vana-supply = <&ab8500_ldo_ana_reg>;
			clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
				 <&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */
				 <&prcmu_clk PRCMU_PLLDSI>, /* HDMI clock */
				 <&prcmu_clk PRCMU_DSI0CLK>, /* DSI 0 */
				 <&prcmu_clk PRCMU_DSI1CLK>, /* DSI 1 */
				 <&prcmu_clk PRCMU_DSI0ESCCLK>, /* TVout clock 0 */
				 <&prcmu_clk PRCMU_DSI1ESCCLK>, /* TVout clock 1 */
				 <&prcmu_clk PRCMU_DSI2ESCCLK>; /* TVout clock 2 */
				 <&prcmu_clk PRCMU_PLLDSI>; /* HDMI clock */
			clock-names = "mcde", "lcd", "hdmi";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			status = "disabled";

			dsi0: dsi@a0351000 {
				compatible = "ste,mcde-dsi";
				reg = <0xa0351000 0x1000>;
				vana-supply = <&ab8500_ldo_ana_reg>;
				clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;
				clock-names = "hs", "lp";
				#address-cells = <1>;
				#size-cells = <0>;
			};
			dsi1: dsi@a0352000 {
				compatible = "ste,mcde-dsi";
				reg = <0xa0352000 0x1000>;
				vana-supply = <&ab8500_ldo_ana_reg>;
				clocks = <&prcmu_clk PRCMU_DSI1CLK>, <&prcmu_clk PRCMU_DSI1ESCCLK>;
				clock-names = "hs", "lp";
				#address-cells = <1>;
				#size-cells = <0>;
			};
			dsi2: dsi@a0353000 {
				compatible = "ste,mcde-dsi";
				reg = <0xa0353000 0x1000>;
				vana-supply = <&ab8500_ldo_ana_reg>;
				/* This DSI port only has the Low Power / Energy Save clock */
				clocks = <&prcmu_clk PRCMU_DSI2ESCCLK>;
				clock-names = "lp";
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};

		cryp@a03cb000 {
+13 −0
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@@ -190,5 +190,18 @@
				};
			};
		};

		mcde@a0350000 {
			status = "okay";

			dsi@a0351000 {
				panel {
					compatible = "samsung,s6d16d0";
					reg = <0>;
					vdd1-supply = <&ab8500_ldo_aux1_reg>;
					reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
				};
			};
		};
	};
};
+13 −0
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@@ -274,5 +274,18 @@
				};
			};
		};

		mcde@a0350000 {
			status = "okay";

			dsi@a0351000 {
				panel {
					compatible = "samsung,s6d16d0";
					reg = <0>;
					vdd1-supply = <&ab8500_ldo_aux1_reg>;
					reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
				};
			};
		};
	};
};