Commit d7e449a8 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Just use icl+ definition for PLANE_WM blocks field 



The unused bits on PLANE_WM & co. are hardwired to zero. So no
need to worry about reading the extra bit on pre-icl.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190205205056.30081-2-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
parent c7e716b8

drivers/gpu/drm/i915/i915_reg.h

+1 −2
Original line number Diff line number Diff line
@@ -6784,8 +6784,7 @@ enum { 


#define _PLANE_BUF_CFG_1_B			0x7127c

#define _PLANE_BUF_CFG_2_B			0x7137c

#define  SKL_DDB_ENTRY_MASK			0x3FF

#define  ICL_DDB_ENTRY_MASK			0x7FF

#define  DDB_ENTRY_MASK				0x7FF /* skl+: 10 bits, icl+ 11 bits */

#define  DDB_ENTRY_END_SHIFT			16

#define _PLANE_BUF_CFG_1(pipe)	\

	_PIPE(pipe, _PLANE_BUF_CFG_1_A, _PLANE_BUF_CFG_1_B)

drivers/gpu/drm/i915/intel_pm.c

+2 −7
Original line number Diff line number Diff line
@@ -3927,14 +3927,9 @@ static unsigned int skl_cursor_allocation(int num_active) 
static void skl_ddb_entry_init_from_hw(struct drm_i915_private *dev_priv,

				       struct skl_ddb_entry *entry, u32 reg)

{

	u16 mask;



	if (INTEL_GEN(dev_priv) >= 11)

		mask = ICL_DDB_ENTRY_MASK;

	else

		mask = SKL_DDB_ENTRY_MASK;

	entry->start = reg & mask;

	entry->end = (reg >> DDB_ENTRY_END_SHIFT) & mask;

	entry->start = reg & DDB_ENTRY_MASK;

	entry->end = (reg >> DDB_ENTRY_END_SHIFT) & DDB_ENTRY_MASK;



	if (entry->end)

		entry->end += 1;

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