Commit d7a60d8e authored by Ben Goz's avatar Ben Goz Committed by Oded Gabbay
Browse files

drm/radeon: Enable sdma preemption 



This patch adds to radeon the enablement of sdma preemption.
This is needed to support HWS of SDMA user-mode queues.

Signed-off-by: default avatarBen Goz <ben.goz@amd.com>
Signed-off-by: default avatarOded Gabbay <oded.gabbay@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 85dfaef3

drivers/gpu/drm/radeon/cik_sdma.c

+29 −0
Original line number Diff line number Diff line
@@ -282,6 +282,33 @@ static void cik_sdma_rlc_stop(struct radeon_device *rdev) 
	/* XXX todo */

}



/**

 * cik_sdma_ctx_switch_enable - enable/disable sdma engine preemption

 *

 * @rdev: radeon_device pointer

 * @enable: enable/disable preemption.

 *

 * Halt or unhalt the async dma engines (CIK).

 */

void cik_sdma_ctx_switch_enable(struct radeon_device *rdev, bool enable)

{

	uint32_t reg_offset, value;

	int i;



	for (i = 0; i < 2; i++) {

		if (i == 0)

			reg_offset = SDMA0_REGISTER_OFFSET;

		else

			reg_offset = SDMA1_REGISTER_OFFSET;

		value = RREG32(SDMA0_CNTL + reg_offset);

		if (enable)

			value |= AUTO_CTXSW_ENABLE;

		else

			value &= ~AUTO_CTXSW_ENABLE;

		WREG32(SDMA0_CNTL + reg_offset, value);

	}

}



/**

 * cik_sdma_enable - stop the async dma engines

 *
@@ -312,6 +339,8 @@ void cik_sdma_enable(struct radeon_device *rdev, bool enable) 
			me_cntl |= SDMA_HALT;

		WREG32(SDMA0_ME_CNTL + reg_offset, me_cntl);

	}



	cik_sdma_ctx_switch_enable(rdev, enable);

}



/**

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