Commit d7507aa1 authored by Ritesh Harjani's avatar Ritesh Harjani Committed by Ulf Hansson
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mmc: sdhci-msm: Make HS400 tuning follow as per recommeneded HW sequence 



During tuning execution for HS400 mode, HW sequence recommends
to select MCLK_SEL/2(0x3) in VENDOR_SPEC & sdhc msm clock at GCC
to be 400MHZ (nearest supported clk). Add this change in tuning
sequence during HS400 tuning.

Signed-off-by: default avatarRitesh Harjani <riteshh@codeaurora.org>
Tested-by: default avatarJeremy McNicoll <jeremymc@redhat.com>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 8a8fa879

drivers/mmc/host/sdhci-msm.c

+14 −2
Original line number Diff line number Diff line
@@ -151,7 +151,8 @@ static unsigned int msm_get_clock_rate_for_bus_mode(struct sdhci_host *host, 
	 */

	if (ios.timing == MMC_TIMING_UHS_DDR50 ||

	    ios.timing == MMC_TIMING_MMC_DDR52 ||

	    ios.timing == MMC_TIMING_MMC_HS400)

	    ios.timing == MMC_TIMING_MMC_HS400 ||

	    host->flags & SDHCI_HS400_TUNING)

		clock *= 2;

	return clock;

}
@@ -611,7 +612,8 @@ void sdhci_msm_hc_select_mode(struct sdhci_host *host) 
{

	struct mmc_ios ios = host->mmc->ios;



	if (ios.timing == MMC_TIMING_MMC_HS400)

	if (ios.timing == MMC_TIMING_MMC_HS400 ||

	    host->flags & SDHCI_HS400_TUNING)

		msm_hc_select_hs400(host);

	else

		msm_hc_select_default(host);
@@ -831,6 +833,16 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode) 
	    ios.timing == MMC_TIMING_UHS_SDR104))

		return 0;



	/*

	 * For HS400 tuning in HS200 timing requires:

	 * - select MCLK/2 in VENDOR_SPEC

	 * - program MCLK to 400MHz (or nearest supported) in GCC

	 */

	if (host->flags & SDHCI_HS400_TUNING) {

		sdhci_msm_hc_select_mode(host);

		msm_set_clock_rate_for_bus_mode(host, ios.clock);

	}



retry:

	/* First of all reset the tuning block */

	rc = msm_init_cm_dll(host);

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