Commit d745c72d authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

arm64: dts: renesas: rcar-gen3: Add reset control properties for display



Add reset control properties to the device nodes for the Display Units
on all supported R-Car Gen3 SoCs.  Note that on these SoCs, there is
only a single reset for each pair of DU channels.

The display nodes on R-Car V3M and V3H already had "resets" properties,
but lacked the corresponding "reset-names" properties.

Join the clocks lines while at it, to increase uniformity.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarUlrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218133019.22299-4-geert+renesas@glider.be
parent 361c5dbb
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+4 −4
Original line number Diff line number Diff line
@@ -3177,11 +3177,11 @@
				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 724>,
				 <&cpg CPG_MOD 723>,
				 <&cpg CPG_MOD 722>,
				 <&cpg CPG_MOD 721>;
			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
				 <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>;
			clock-names = "du.0", "du.1", "du.2", "du.3";
			resets = <&cpg 724>, <&cpg 722>;
			reset-names = "du.0", "du.2";

			renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
			renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
+3 −2
Original line number Diff line number Diff line
@@ -2827,10 +2827,11 @@
			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 724>,
				 <&cpg CPG_MOD 723>,
			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
				 <&cpg CPG_MOD 722>;
			clock-names = "du.0", "du.1", "du.2";
			resets = <&cpg 724>, <&cpg 722>;
			reset-names = "du.0", "du.2";

			renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
			renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
+3 −2
Original line number Diff line number Diff line
@@ -2503,10 +2503,11 @@
			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 724>,
				 <&cpg CPG_MOD 723>,
			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
				 <&cpg CPG_MOD 721>;
			clock-names = "du.0", "du.1", "du.3";
			resets = <&cpg 724>, <&cpg 722>;
			reset-names = "du.0", "du.3";

			renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
			renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
+1 −0
Original line number Diff line number Diff line
@@ -1121,6 +1121,7 @@
			clock-names = "du.0";
			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
			resets = <&cpg 724>;
			reset-names = "du.0";
			renesas,vsps = <&vspd0 0>;

			status = "disabled";
+1 −0
Original line number Diff line number Diff line
@@ -1491,6 +1491,7 @@
			clock-names = "du.0";
			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
			resets = <&cpg 724>;
			reset-names = "du.0";
			renesas,vsps = <&vspd0 0>;

			status = "disabled";
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