Commit d6d854cc authored by Patrice Chotard's avatar Patrice Chotard
Browse files

ARM: dts: STi: Fix bindings notation 



Remove leading 0x and 0s from bindings notation
Add missing unit-address and remove some which are useless.

This allows to fix several warnings like :

Warning (unit_address_vs_reg): Node XXXX has a reg or ranges property, but no unit name
Warning (simple_bus_reg): Node XXXX simple-bus unit address format error, expected "123456"
Warning (unit_address_vs_reg): Node XXXX has a unit name, but no reg property

Signed-off-by: default avatarPatrice Chotard <patrice.chotard@st.com>
parent 7928b2cb

arch/arm/boot/dts/stih407-b2120.dts

+1 −1
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ 
		linux,stdout-path = &sbc_serial0;

	};



	memory {

	memory@40000000 {

		device_type = "memory";

		reg = <0x40000000 0x80000000>;

	};

arch/arm/boot/dts/stih407-clock.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -83,7 +83,7 @@ 
		 * Bootloader initialized system infrastructure clock for

		 * serial devices.

		 */

		clk_ext2f_a9: clockgen-c0@13 {

		clk_ext2f_a9: clockgen-c0 {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <200000000>;
@@ -260,7 +260,7 @@ 
			clock-frequency = <0>;

		};



		clockgen-d2@x9106000 {

		clockgen-d2@9106000 {

			compatible = "st,clkgen-c32";

			reg = <0x9106000 0x1000>;

arch/arm/boot/dts/stih407-family.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -92,7 +92,7 @@ 
		clocks = <&arm_periph_clk>;

	};



	l2: cache-controller {

	l2: cache-controller@8762000 {

		compatible = "arm,pl310-cache";

		reg = <0x08762000 0x1000>;

		arm,data-latency = <3 3 3>;
@@ -389,7 +389,7 @@ 
			reset-names = "global", "port";

		};



		miphy28lp_phy: miphy28lp@9b22000 {

		miphy28lp_phy: miphy28lp {

			compatible = "st,miphy28lp-phy";

			st,syscfg = <&syscfg_core>;

			#address-cells	= <1>;
@@ -803,7 +803,7 @@ 
			status		= "okay";

		};



		st231_gp0: st231-gp0@0 {

		st231_gp0: st231-gp0 {

			compatible	= "st,st231-rproc";

			memory-region	= <&gp0_reserved>;

			resets		= <&softreset STIH407_ST231_GP0_SOFTRESET>;
@@ -816,7 +816,7 @@ 
			mboxes = <&mailbox0 0 2>, <&mailbox2 0 1>, <&mailbox0 0 3>, <&mailbox2 0 0>;

		};



		st231_delta: st231-delta@0 {

		st231_delta: st231-delta {

			compatible	= "st,st231-rproc";

			memory-region	= <&delta_reserved>;

			resets		= <&softreset STIH407_ST231_DMU_SOFTRESET>;

arch/arm/boot/dts/stih407-pinctrl.dtsi

+5 −5
Original line number Diff line number Diff line
@@ -45,7 +45,7 @@ 
	};



	soc {

		pin-controller-sbc {

		pin-controller-sbc@961f080 {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "st,stih407-sbc-pinctrl";
@@ -369,7 +369,7 @@ 
			};

		};



		pin-controller-front0 {

		pin-controller-front0@920f080 {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "st,stih407-front-pinctrl";
@@ -929,7 +929,7 @@ 
			};

		};



		pin-controller-front1 {

		pin-controller-front1@921f080 {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "st,stih407-front-pinctrl";
@@ -962,7 +962,7 @@ 
			};

		};



		pin-controller-rear {

		pin-controller-rear@922f080 {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "st,stih407-rear-pinctrl";
@@ -1157,7 +1157,7 @@ 
			};

		};



		pin-controller-flash {

		pin-controller-flash@923f080 {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "st,stih407-flash-pinctrl";

arch/arm/boot/dts/stih410-b2120.dts

+1 −1
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ 
		linux,stdout-path = &sbc_serial0;

	};



	memory {

	memory@40000000 {

		device_type = "memory";

		reg = <0x40000000 0x80000000>;

	};

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